SLVSGW5A November   2022  – January 2024 TPS92620-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Power Supply (SUPPLY)
        1. 6.3.1.1 Power-On Reset (POR)
        2. 6.3.1.2 Suppply Current in Fault Mode
      2. 6.3.2  Enable and Shutdow(EN)
      3. 6.3.3  Constant-Current Output and Setting (INx)
      4. 6.3.4  Thermal Sharing Resistor (OUTx and RESx)
      5. 6.3.5  PWM Control (PWMx)
      6. 6.3.6  Supply Control
      7. 6.3.7  Diagnostics
        1. 6.3.7.1 LED Short-to-GND Detection
        2. 6.3.7.2 LED Open-Circuit Detection
        3. 6.3.7.3 LED Open-Circuit Detection Enable (DIAGEN)
        4. 6.3.7.4 Overtemperature Protection
        5. 6.3.7.5 Low Dropout Operation
      8. 6.3.8  FAULT Bus Output With One-Fails-All-Fail
      9. 6.3.9  FAULT Table
      10. 6.3.10 LED Fault Summary
      11. 6.3.11 IO Pins Inner Connection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Undervoltage Lockout, V(SUPPLY) < V(POR_rising)
      2. 6.4.2 Normal Operation V(SUPPLY) ≥ 4.5V
      3. 6.4.3 Low-Voltage Dropout Operation
      4. 6.4.4 Fault Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 BCM Controlled Rear Lamp With One-Fails-All-Fail Setup
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Independent PWM Controlled Rear Lamp By MCU
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) TPS92620-Q1 UNIT
DRR (WSON) DGN (HVSSOP)
12 PINS 12 PINS
RθJA Junction-to-ambient thermal resistance 51.2 39.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 50.7 60.9 °C/W
RθJB Junction-to-board thermal resistance 25.2 15.5 °C/W
ψJT Junction-to-top characterization parameter 1.3 2.6 °C/W
ψJB Junction-to-board characterization parameter 25.2 15.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 9.4 2.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.