SLVSE03B
April 2019 – February 2021
TPS929120-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Device Bias and Power
7.3.1.1
Power Supply (SUPPLY)
7.3.1.2
5-V Low-Drop-Out Linear Regulator (VLDO)
7.3.1.3
Undervoltage Lockout (UVLO) and Power-On-Reset (POR)
7.3.1.4
Programmable Low Supply Warning
7.3.2
Constant Current Output
7.3.2.1
Reference Current With External Resistor (REF)
7.3.2.2
64-Step Programmable High-Side Constant-Current Output
7.3.3
PWM Dimming
7.3.3.1
PWM Dimming Frequency
7.3.3.2
PWM Generator
7.3.3.3
Linear Brightness Control
7.3.3.4
Exponential Brightness Control
7.3.3.5
External Clock Input for PWM Generator (CLK)
7.3.3.6
External PWM Input ( PWM0 and PWM1)
7.3.4
On-chip 8-bit Analog-to-Digital Converter (ADC)
7.3.5
Diagnostic and Protection in Normal State
7.3.5.1
Fault Masking
7.3.5.2
Supply Undervoltage Lockout Diagnostics in Normal State
7.3.5.3
Low-Supply Warning Diagnostics in Normal State
7.3.5.4
Reference Diagnostics in Normal State
7.3.5.5
Pre-Thermal Warning and Overtemperature Protection in Normal State
7.3.5.6
Communication Loss Diagnostic in Normal State
7.3.5.7
LED Open-Circuit Diagnostics in Normal State
7.3.5.8
LED Short-circuit Diagnostics in Normal State
7.3.5.9
On-Demand Off-State Invisible Diagnostics
7.3.5.10
On-Demand Off-State Single-LED Short-Circuit (SS) Diagnostics
7.3.5.11
Automatic Single-LED Short-Circuit (AutoSS) Detection in Normal State
7.3.5.12
EEPROM CRC Error in Normal State
47
7.3.6
Diagnostic and Protection in Fail-Safe States
7.3.6.1
Fault Masking
7.3.6.2
Supply UVLO Diagnostics in Fail-Safe States
7.3.6.3
Low-supply Warning Diagnostics in Fail-Safe states
7.3.6.4
Reference Diagnostics at Fail-Safe States
7.3.6.5
Overtemperature Protection in Fail-Safe State
7.3.6.6
LED Open-circuit Diagnostics in Fail-Safe State
7.3.6.7
LED Short-circuit Diagnostics in Fail-safe State
7.3.6.8
EEPROM CRC Error in Fail-safe State
57
7.4
Device Functional Modes
7.4.1
POR State
7.4.2
Initialization State
7.4.3
Normal State
7.4.4
Fail-Safe States
7.4.5
Program State
7.4.6
Programmable Output Failure State
7.4.7
ERR Output
7.4.8
Register Default Data
7.5
Programming
7.5.1
FlexWire Protocol
7.5.1.1
Protocol Overview
7.5.1.2
UART Interface Address Setting
7.5.1.3
Status Response
7.5.1.4
Synchronization Byte
7.5.1.5
Device Address Byte
7.5.1.6
Register Address Byte
7.5.1.7
Data Frame
76
7.5.1.8
CRC Frame
7.5.1.9
Burst Mode
7.5.2
Registers Lock
7.5.3
All Registers CRC Check
7.5.4
EEPROM Programming
7.5.4.1
Chip Selection by Pulling REF Pin High
7.5.4.2
Chip Selection by ADDR Pins configuration
7.5.4.3
EEPROM Register Access and Burn
7.5.4.4
EEPROM Program State Exit
7.5.4.5
Reading Back EEPROM
7.6
Register Maps
7.6.1
FullMap Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Smart Rear Lamp With Distributed LED drivers
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.4
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PWP|24
MPDS372A
Thermal pad, mechanical data (Package|Pins)
PWP|24
PPTD402
Orderable Information
slvse03b_oa
slvse03b_pm
7.4
Device Functional Modes
Figure 7-8
Device Functional Mode Statemachine