SLVSG60A April 2023 – April 2024 TPS929160-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The TPS929160-Q1 provides registers content lock feature to prevent unintended modification of registers. There are four register lock bits for different type of registers covering all registers as the below table illustrates. TI recommends locking the register after register writing operations.
Register IP Name | Address | Lock Register Name | Lock Register Default |
---|---|---|---|
BRT (PWMMx) | 00h~17h | BRTLOCK | 0 (unlock) |
BRT (PWMLx) | 20h~37h | ||
BRT | 40h~44h | ||
IOUT | 50h~67h | IOUTLOCK | 1 (lock) |
CONF | 70h~83h | CONFLOCK | 1 (lock) |
CONF | 84h~87h | Always locked except in EEPROM program state | |
CTRL (ADCCH and CLR) | 90h and 91h | No Lock Register | |
CTRL | 92h~95h | Unlock by sending serial code to CTRLGATE register | |
CTRL (CTRLGATE) | 96h | No Lock Register | |
CTRL (EEP) | 97h | Unlock by sending serial code to EEPGATE register | |
CTRL (EEPGATE) | 98h | No Lock Register |
The below instruction is required to access and exit the CTRL (92h to 95h) register.
The below instruction is required to access and exit the EEP (97h) register.