SLVSG60A April 2023 – April 2024 TPS929160-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The TPS929160-Q1 supports using REF pin as chip-select during EEPROM programming. Considering multiple TPS929160-Q1 devices connected on one FlexWire bus before burning EEPROM, the slave address for all TPS929160-Q1 are all same before programming in case internal EEPROM register DEVADDR is used for slave address setup. The EEPROM burning instruction can be sent to target TPS929160-Q1 by pulling the REF pin of the target TPS929160-Q1 to 5 V. After the REF pin is pulled up to 5 V, the TPS929160-Q1 ignores the device address setup by ADDR3/ADDR2/ADDR1/ADDR0 pins or EEPROM programmed device address in EEP_DEVADDR. The master controller must send out data to target TPS929160-Q1 with device address as 0h and not in broadcast mode.