DLPS039G December   2015  – July 2024 TPS99000-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics—Transimpedance Amplifier Parameters
    6. 5.6  Electrical Characteristics—Digital to Analog Converters
    7. 5.7  Electrical Characteristics—Analog to Digital Converter
    8. 5.8  Electrical Characteristics—FET Gate Drivers
    9. 5.9  Electrical Characteristics—Photo Comparator
    10. 5.10 Electrical Characteristics—Voltage Regulators
    11. 5.11 Electrical Characteristics—Temperature and Voltage Monitors
    12. 5.12 Electrical Characteristics—Current Consumption
    13. 5.13 Power-Up Timing Requirements
    14. 5.14 Power-Down Timing Requirements
    15. 5.15 Timing Requirements—Sequencer Clock
    16. 5.16 Timing Requirements—Host and Diagnostic Port SPI Interface
    17. 5.17 Timing Requirements—ADC Interface
    18. 5.18 Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Illumination Control
        1. 6.3.1.1 Illumination System High Dynamic Range Dimming Overview
        2. 6.3.1.2 Illumination Control Loop
        3. 6.3.1.3 Continuous Mode Operation
          1. 6.3.1.3.1 Output Capacitance in Continuous Mode
          2. 6.3.1.3.2 Continuous Mode Driver Distortion and Blanking Current
          3. 6.3.1.3.3 Continuous Mode S_EN2 Dissipative Load Shunt Options
          4. 6.3.1.3.4 Continuous Mode Constant OFF Time
          5. 6.3.1.3.5 Continuous Mode Current Limit
        4. 6.3.1.4 Discontinuous Mode Operation
          1. 6.3.1.4.1 Discontinuous Mode Pulse Width Limit
          2. 6.3.1.4.2 COMPOUT_LOW Timer in Discontinuous Operation
          3. 6.3.1.4.3 Dimming Within Discontinuous Operation Range
          4. 6.3.1.4.4 Multiple Pulse Heights to Increase Bit Depth
          5. 6.3.1.4.5 TIA Gain Adjustment
          6. 6.3.1.4.6 Current Limit in Discontinuous Mode
          7. 6.3.1.4.7 CMODE Big Cap Mode in Discontinuous Operation
      2. 6.3.2 Over-Brightness Detection
        1. 6.3.2.1 Photo Feedback Monitor BIST
        2. 6.3.2.2 Excessive Brightness BIST
      3. 6.3.3 Analog to Digital Converter
        1. 6.3.3.1 Analog to Digital Converter Input Table
      4. 6.3.4 Power Sequencing and Monitoring
        1. 6.3.4.1 Power Monitoring
      5. 6.3.5 DMD Mirror Voltage Regulator
      6. 6.3.6 Low Dropout Regulators
      7. 6.3.7 System Monitoring Features
        1. 6.3.7.1 Windowed Watchdog Circuits
        2. 6.3.7.2 Die Temperature Monitors
        3. 6.3.7.3 External Clock Ratio Monitor
      8. 6.3.8 Communication Ports
        1. 6.3.8.1 Serial Peripheral Interface (SPI)
    4. 6.4 Device Functional Modes
      1. 6.4.1 OFF
      2. 6.4.2 STANDBY
      3. 6.4.3 POWERING_DMD
      4. 6.4.4 DISPLAY_RDY
      5. 6.4.5 DISPLAY_ON
      6. 6.4.6 PARKING
      7. 6.4.7 SHUTDOWN
    5. 6.5 Register Maps
      1. 6.5.1 System Status Registers
      2. 6.5.2 ADC Control
      3. 6.5.3 General Fault Status
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 HUD
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Application Design Considerations
          1. 7.2.1.2.1 Photodiode Considerations
          2. 7.2.1.2.2 LED Current Measurement
          3. 7.2.1.2.3 Setting the Current Limit
          4. 7.2.1.2.4 Input Voltage Variation Impact
          5. 7.2.1.2.5 Discontinuous Mode Photo Feedback Considerations
          6. 7.2.1.2.6 Transimpedance Amplifiers (TIAs, Usage, Offset, Dark Current, Ranges, RGB Trim)
      2. 7.2.2 Headlight
        1. 7.2.2.1 Design Requirements
  9. 8 Power Supply Recommendations
    1. 8.1 TPS99000-Q1 Power Supply Architecture
    2. 8.2 TPS99000-Q1 Power Outputs
    3. 8.3 Power Supply Architecture
  10. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Power/High Current Signals
      2. 9.1.2 Sensitive Analog Signals
      3. 9.1.3 High-Speed Digital Signals
      4. 9.1.4 High Power Current Loops
      5. 9.1.5 Kelvin Sensing Connections
      6. 9.1.6 Ground Separation
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.3.1 Analog to Digital Converter Input Table

Table 6-2 Analog to Digital Converter Input Table
PARAMETERINTERNAL OR EXTERNALTEST CONDITIONS(1)MINTYPMAXUNIT
Channel 0, GainLow side sense ampExternalGain set to 24x22.562425.44V/V
Channel 0, GainLow side sense ampExternalGain set to 12x11.281212.72V/V
Channel 0, GainLow side sense ampExternalGain set to 9x8.4699.54V/V
Channel 1, GainADC_IN1_PAD (LED_ANODE)External0.9801.0001.020V/V
Channel 2, GainADC_IN2_PAD (VLED)External0.9801.0001.020V/V
Channel 3, GainADC_IN3_PADExternal0.9801.0001.020V/V
Channel 4, GainADC_IN4_PADExternal0.9801.0001.020V/V
Channel 5, GainADC_IN5_PAD (R_LED_THERM)External0.9801.0001.020V/V
Channel 6, GainADC_IN6_PAD (G_LED_THERM)External0.9801.0001.020V/V
Channel 7, GainADC_IN7_PAD (B_LED_THERM)External0.9801.0001.020V/V
Channel 8, GainVBIASInternal0.05960.06210.0646V/V
Channel 9, GainVOFFSETInternal0.11120.1170.1218V/V
Channel 10, GainVRESETInternal–0.1978–0.190–0.1822V/V
Channel 10, OffsetVRESETInternal–1.217–1.1935–1.169V
Channel 11, GainVMAINInternal0.525460.5590.59254V/V
Channel 12, GainDVDDInternal0.313020.3330.35298V/V
Channel 13, GainV1.1Internal0.657060.6990.74094V/V
Channel 14, GainV1.8Internal0.403260.4290.45474V/V
Channel 15, GainV3.3Internal0.22090.2350.2491V/V
Channel 16, OffsetM8 LDO offsetInternal8.158.4008.65V
Channel 16, GainM8 LDOInternal0.9801.0001.020V/V
Channel 17, Gainext ADC VREFInternal0.490.50.51V/V
Channel 18, GainDriver PowerInternal0.203980.2170.23002V/V
Channel 19, GainDie Temp1Internal0.4900.5000.510V/V
Channel 20, GainDie Temp2Internal0.4900.5000.510V/V
Channel 21, GainILED Control DACInternal0.4900.5000.510V/V
Channel 22, GainPhoto Feedback Control DACInternal0.4900.5000.510V/V
Channel 23, GainOver-Brightness Control DACInternal0.4900.5000.510V/V
Channel 24, GainTIA1 Real TimeInternal0.4900.5000.510V/V
Channel 25, GainTIA1 Low BandwidthInternal0.4900.5000.510V/V
Channel 26, GainTIA2 Real TimeInternal0.4900.5000.510V/V
Channel 27, GainTIA2 Low BandwidthInternal0.4900.5000.510V/V
Channel 28, Gain Channel not usedInternal
Channel 29, GainMain Bandgap, 0.5VInternal0.9801.0001.020V/V
Channel 30, GainTIA1 MonitorInternal0.9801.0001.020V/V
Channel 31, GainTIA2 MonitorInternal0.9801.0001.020V/V
(1) The conversionformula is (X + Offset) × Gain. X is the input voltage. Offset is 0V unless specified above.