SLVSG72 September   2021 TPSM560R6H

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 12 V)
    7. 6.7 Typical Characteristics (VIN = 24 V)
    8. 6.8 Typical Characteristics (VIN = 48 V)
    9. 6.9 Typical Characteristics (VIN = 60 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adjustable Output Voltage (FB)
      2. 7.3.2 Minimum Input Capacitance
      3. 7.3.3 Minimum Output Capacitance
      4. 7.3.4 Precision Enable (EN), Undervoltage Lockout (UVLO), and Hysteresis (HYS)
      5. 7.3.5 Power Good (PGOOD)
      6. 7.3.6 Overcurrent Protection (OCP)
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Shutdown Mode
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Power-Good Signal
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Theta JA Versus PCB Area
      2. 10.2.2 Package Specifications
      3. 10.2.3 EMI
        1. 10.2.3.1 EMI Plots
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Limits apply over TA = –40°C to +105°C, VIN = 24 V, VOUT = 3.3 V, IOUT =  600 mA, (unless otherwise noted); minimum and maximum limits are specified through production test or by design. Typical values represent the most likely parametric norm and are provided for reference only.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE (VIN)
VIN Input voltage range Over IOUT range 4.2 (1) 60 V
VIN turn-on VIN increasing, IOUT = 0 A, VEN = VIN 3.8 V
VIN turn-off VIN decreasing, IOUT = 0 A, VEN = VIN 3.3 V
ISHDN Shutdown supply current VEN = 0 V, IOUT = 0 A 5 µA
INTERNAL LDO (V5V)
V5V Internal LDO output voltage appearing at the V5V pin 6 V ≤ VIN ≤ 60 V 4.75 5 5.25 V
FEEDBACK
VFB Load regulation TA = +25°C, 0 A ≤ IOUT ≤ 0.6 A 0.057 %
VFB Line regulation TA = +25°C, IOUT = 0 A, 6 V ≤ VIN ≤ 60 V 0.024 %
IFB Current into FB pin FB = 1 V 0.2 nA
CURRENT
IOUT  Output current TA = 25ºC 0 0.6 A
IOUT Overcurrent threshold VOUT = 3.3 V, TA = 25ºC 0.89 A
VHC FB pin voltage required to trip short-circuit Hiccup mode 0.4 V
tHC Time between current-limit hiccup burst 94 ms
ENABLE (EN PIN)
VEN-VCC-H EN input level required to turn on the internal LDO Rising threshold 1.14 V
VEN-VCC-L EN input level required to turn off the internal LDO Falling threshold 0.3 V
VEN-H EN input level required to start switching Rising threshold 1.157 1.231 1.30 V
VEN-HYS Hysteresis below VEN-H Hysteresis below VEN-H; falling 110 mV
ILKG-EN Enable input leakage current VEN = 3.3 V 0.2 nA
POWER GOOD (PGOOD PIN)
VPG-LOW-UP VOUT rising (fault) % of FB voltage 107%
VPG-HIGH-DN VOUT falling (good) % of FB voltage 105%
VPG-HIGH-UP VOUT rising (good) % of FB voltage 95%
VPG-LOW-DN VOUT falling (fault) % of FB voltage 93%
RPG Power-good flag, RDSON VEN = 0 V 35 Ω
VIN-PG Minimum input voltage for proper PGOOD function IPG = 50 µA, EN = 0 V 2 V
PERFORMANCE
η Efficiency VOUT = 3.3 V, IOUT = 0.75 A, TA = 25ºC 81%
η Efficiency VOUT = 5.0 V, IOUT = 0.75 A, TA = 25ºC 86%
SOFT START
tSS Internal soft-start time 4.5 ms
SWITCHING FREQUENCY
ƒSW Switching frequency IOUT = 0.75 A, TA = 25ºC 0.85 1(2) 1.15 MHz
(1) The recommended minimum VIN is 4.2 V or (VOUT + 600 mV), whichever is greater.
(2) The typical switching frequency of this device changes based on operating conditions. See the Switching Frequency section for more information.