SLUSEP8 January   2022 TPSM5D1806E

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 12 V)
    7. 6.7 Typical Characteristics (VIN = 5 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjustable Output Voltage
      2. 7.3.2  Frequency Selection
        1. 7.3.2.1 Synchronization
        2. 7.3.2.2 Allowable Switching Frequency
      3. 7.3.3  Minimum and Maximum Input Voltage
      4. 7.3.4  Recommended Settings
      5. 7.3.5  Device Mode Configuration
        1. 7.3.5.1 MODE1 (Operating Mode and Phase Position)
        2. 7.3.5.2 MODE2 (Setting the Switching Frequency)
      6. 7.3.6  Input Capacitors
      7. 7.3.7  Minimum Required Output Capacitance
      8. 7.3.8  Ambient Temperature Versus Total Power Dissipation
      9. 7.3.9  Remote Sense
      10. 7.3.10 Enable (EN) and Undervoltage Lockout (UVLO)
      11. 7.3.11 Soft Start
      12. 7.3.12 Power Good
      13. 7.3.13 Safe Start-Up into Pre-Biased Outputs
      14. 7.3.14 BP5
      15. 7.3.15 Overcurrent Protection
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application (Dual Outputs)
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application (Paralleled Outputs)
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 Output Voltage Setpoint
          2. 8.2.4.2.2 Input Capacitors
          3. 8.2.4.2.3 Output Capacitor Selection
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
      1. 10.2.1 Package Specifications
      2. 10.2.2 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.4 Recommended Settings

Table 7-3 lists the recommended operating settings for several common output voltages. The table takes into account the minimum and maximum input voltage limits along with timing and current limitations. The table also lists the minimum required effective output capacitance for each output voltage. Also included in this table is the minimum required input voltage and required enable divider resistors to ensure safe turn ON at the minimum input voltage.

Refer to Table 7-1 for the allowable switching frequency. The recommended switching frequency typically results in the highest efficiency. When operating at a switching frequency other than the recommended, consult Section 7.3.3 for the minimum and maximum allowable input voltage.

When setting the switching frequency, both channels of the device are set to the same frequency. When operating in dual output configuration, make sure that both channels can be operated at the desired switching frequency by referencing.

Table 7-3 Recommended Settings
Output Voltage
(V)		Top Feedback Resistor
RFBT(1)
(kΩ)		FSW
(kHz)		MODE2 Resistor
(kΩ)		Minimum
COUT(2)
(µF)		Minimum Input Voltage
(V) 		Bottom Enable Resistor
RENB(3)
(kΩ)
0.5open50010.74004.5— (4)
0.86.0450010.72804.5—
0.98.06100017.42654.5—
1.010.0100017.42504.5—
1.112.1100017.42354.5—
1.214.0100017.42204.5—
1.520.0100017.41804.5—
1.826.1100017.41404.5—
2.540.2150028.71004.5—
3.049.9150028.7854.829.4
3.356.2150028.7755.326.1
4.069.8200053.6657.118.2
4.580.6200053.6607.916.2
5.090.9200053.6508.814.3
5.5100200053.6459.613.0
(1) RFBB = 10 kΩ
(2) Minimum COUT listed is the effective value, taking into account the effects of DC bias and temperature variation.
(3) RENT = 100 kΩ
(4) "—" means not required.