SLVSH13 August   2024 TPSM83102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Rating
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics 
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Enable and Soft Start
      3. 7.3.3 Adjustable Output Voltage
      4. 7.3.4 Reverse Current Operation
      5. 7.3.5 Protection Features
        1. 7.3.5.1 Input Overvoltage Protection
        2. 7.3.5.2 Short Circuit Protection
        3. 7.3.5.3 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-, Fast-, and Fast-Mode Plus Protocol
      3. 7.5.3 I2C Update Sequence
    6. 7.6 Register Map
      1. 7.6.1 Register Description
        1. 7.6.1.1 Register Map
        2. 7.6.1.2 Register CONTROL1 (Register address: 0x02; Default: 0x08)
        3. 7.6.1.3 Register VOUT (Register address: 0x03; Default: 0x5C)
        4. 7.6.1.4 Register CONTROL2 (Register address: 0x05; Default: 0x45)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Setting the Output Voltage
      3. 8.2.3 Application Curves
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design with WEBENCH Tools
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information
    2. 12.2 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
  • SIU|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.3 Application Curves

TPSM83102 TPSM83103 Efficiency vs Output Current (FPWM)
VOUT = 3.3 V MODE = High
Figure 8-2 Efficiency vs Output Current (FPWM)
TPSM83102 TPSM83103 Efficiency vs Input Voltage (PFM)
VOUT = 3.3 V MODE = Low
Figure 8-4 Efficiency vs Input Voltage (PFM)
TPSM83102 TPSM83103 Switching Waveforms, Boost Operation with 1-A Load
VIN = 2.7 V, VOUT = 3.3 V IOUT = 1 A, MODE = Low
Figure 8-6 Switching Waveforms, Boost Operation with 1-A Load
TPSM83102 TPSM83103 Switching Waveforms, Buck Operation with 1-A Load
VIN = 4.3 V, VOUT = 3.3 V IOUT = 1 A, MODE = Low
Figure 8-8 Switching Waveforms, Buck Operation with 1-A Load
TPSM83102 TPSM83103 Start-Up by EN
VIN = 3.6 V, VOUT = 3.3 V Rload = 4 Ω, MODE = Low
Figure 8-10 Start-Up by EN
TPSM83102 TPSM83103 Load Transient at 2.7-V Input Voltage
VIN = 2.7 V, VOUT = 3.3 V IOUT = 100 mA to 1 A with 20-µs slew rate
Figure 8-12 Load Transient at 2.7-V Input Voltage
TPSM83102 TPSM83103 Load Transient at 3.6-V Input Voltage
VIN = 3.6 V, VOUT = 3.3 V IOUT = 100 mA to 1 A with 20-µs slew rate
Figure 8-14 Load Transient at 3.6-V Input Voltage
TPSM83102 TPSM83103 Load Transient at 4.3-V Input Voltage
VIN = 4.3 V, VOUT = 3.3 V IOUT = 100 mA to 1 A with 20-µs slew rate
Figure 8-16 Load Transient at 4.3-V Input Voltage
TPSM83102 TPSM83103 Line Transient at 1-A Load Current
VIN = 2.7 V to 4.3 V with 20-µs slew rate, VOUT = 3.3 V IOUT = 1 A
Figure 8-18 Line Transient at 1-A Load Current
TPSM83102 TPSM83103 Output Short Protection (Entry)
VIN = 3.6 V, VOUT = 3.3 V IOUT = 1 A, FPWM
Figure 8-20 Output Short Protection (Entry)
TPSM83102 TPSM83103 Load Regulation (FPWM)
VOUT = 3.3 V MODE = High
Figure 8-3 Load Regulation (FPWM)
TPSM83102 TPSM83103 Load Regulation (PFM)
VO = 3.3 V MODE = High
Figure 8-5 Load Regulation (PFM)
TPSM83102 TPSM83103 Switching Waveforms with 1-A Load
VIN = 3.3 V, VOUT = 3.3 V IOUT = 1 A, MODE = Low
Figure 8-7 Switching Waveforms with 1-A Load
TPSM83102 TPSM83103 Switching Waveforms at 1-mA Load
VIN = 3.6 V, VOUT = 3.3 V IOUT = 1 mA, MODE = Low
Figure 8-9 Switching Waveforms at 1-mA Load
TPSM83102 TPSM83103 Shutdown by EN
VIN = 3.6 V, VOUT = 3.3 V Rload = 4 Ω, MODE = Low
Figure 8-11 Shutdown by EN
TPSM83102 TPSM83103 Load Sweep at 2.7-V Input Voltage
VIN = 2.7 V, VOUT = 3.3 V IOUT = 100 mA to 1-A sweep
Figure 8-13 Load Sweep at 2.7-V Input Voltage
TPSM83102 TPSM83103 Load Sweep at 3.6-V Input Voltage
VIN = 3.6 V, VOUT = 3.3 V IOUT = 100 mA to 1-A sweep
Figure 8-15 Load Sweep at 3.6-V Input Voltage
TPSM83102 TPSM83103 Load Sweep at 4.3-V Input Voltage
VIN = 4.3 V, VOUT = 3.3 V IOUT = 100 mA to 1-A sweep
Figure 8-17 Load Sweep at 4.3-V Input Voltage
TPSM83102 TPSM83103 Line Sweep at 1-A Load Current
VIN = 2.7-V to 4.3-V sweep, VOUT = 3.3 V IOUT = 1 A
Figure 8-19 Line Sweep at 1-A Load Current
Table 8-4 Components for Application Characteristic Curves for VOUT = 3.3 V
REFERENCEDESCRIPTIONPART NUMBERMANUFACTURER(1)
U1High Power Density 1.5 A Buck-Boost ConverterTPSM83102 or TPSM83103Texas Instruments
C122 µF, 0603, Ceramic Capacitor, ±20%, 6.3 VGRM187R61A226ME15Murata
C247 µF, 0805, Ceramic Capacitor, ±20%, 6.3 VGRM219R60J476ME44Murata
(1) See the Section 10.1.1.