SLUSF73 august 2023 TPSM8S6C24
PRODUCTION DATA
CMD Address | 46h |
Write Transaction: | Write Word |
Read Transaction: | Read Word |
Format: | SLINEAR11 per CAPABILITY |
Phased: | Yes |
NVM Back-up: | EEPROM or Pin Detection |
Updates: | On-the-fly |
The IOUT_OC_FAULT_LIMIT command sets the value of the output current that causes the overcurrent detector to indicate an overcurrent fault condition. While each TPSM8S6C24 device in a multi-phase stack has its own IOUT_OC_FAULT_LIMIT and comparator, the effective current limit of the multi-phase stack is equal to the lowest IOUT_OC_FAULT_LIMIT setting times the number of phases in the stack.
When the overcurrent fault is triggered, the TPSM8S6C24 responds according to IOUT_OC_FAULT_RESPONSE.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RW | RW | RW | RW | RW | RW | RW | RW |
IO_OCF_EXP | IO_OCF_MAN | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RW | RW | RW | RW | RW | RW | RW | RW |
IO_OCF_MAN |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Access | Reset | Description |
---|---|---|---|---|
15:11 | IO_OCF_ EXP | RW | 11110b | Linear format two’s complement exponent |
10:0 | IO_OCF_ MAN | RW | NVM | Linear format two’s complement mantissa. Refer to the table below. Multi-phase Stack Current Limit up to 62 A x Number of Phases (PHASE = FFh) Per Phase OCL: up to 62 A (PHASE ! = FFh) |
Attempts to write (46h) IOUT_OC_FAULT_LIMIT to any value outside those specified as valid, will be considered invalid/unsupported data and cause the TPSM8S6C24 to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.
Command Resolution and NVM Store/Restore Behavior
The Per-PHASE (PHASE != FFh) IOUT_OC_FAULT_LIMIT is implemented in analog hardware. The analog hardware supports current limits from 8 A to 62 A in 2-A steps. Programmed values not exactly equal to hardware supported values will be rounded up to the next available supported value. Values less than 8 A per device can be written to IOUT_OC_FAULT_LIMIT, but values less than 8 A per device will be implemented as 8 A in hardware. The TPSM8S6C24 provides only limited NVM-backed options for this command. Following a power-cycle or NVM Store/Restore operation, the value will be rounded to the nearest NVM supported value. The NVM supports values up to 62 A in 0.25-A steps.
Phased Command Behavior
Write when PHASE = FFh: Set IOUT_OC_FAULT_LIMIT for each phase to the written value divided by the number of phases.
Read when PHASE = FFh: Report the IOUT_OC_FAULT_LIMIT value of PHASE = 00h (Loop Controller) times the number of phases.
Write when PHASE != FFh: Set IOUT_OC_FAUL_LIMIT for the current phase to the written value.
Read when PHASE != FFh: Report the IOUT_OC_FAULT_LIMIT value of the current phase.