SLUSF73 august 2023 TPSM8S6C24
PRODUCTION DATA
The oscillator can be synchronized to external clock (SYNC IN) or output a clock to synchronize other devices (SYNC out) on the SYNC pin. To support phase shifted clock for both multi-rail interleaving and multi-phase operation, the internal oscillator can be phase-shifted from the SYNC pin by 0, 90, 120, 180, 240, or 270 degrees for 1-, 2-, 3-, or 4-phase operation. The SYNC IN or SYNC OUT function, and phase position of single phase or standalone devices can be selected by pinstrapping through a resistor divider on at the ADRSEL pin, or by the resistor from the MSEL2 pin to AGND for multi-phase loop follower devices.
In single output multi-phase stack configurations, the SYNC phase offset is programmed along with device count and phase position using the MSEL2 pin. Loop follower devices in multi-phase stacks are always configured as SYNC_IN while the loop controller device can be configured for auto-detect, SYNC_IN, or SYNC_OUT through the resistor divider on the ADRSEL pin.
RDIV CODE | PHASE POSITION (DEGREE) | SYNC IN and OUT |
---|---|---|
Open (No resistor to BP1V5) | 0 | Auto-detect In and Out |
0, 1 | 0 | In |
2, 3 | 90 | In |
4, 5 | 120 | In |
6, 7 | 180 | In |
8, 9 | 240 | In |
10,11 | 270 | In |
12, 13 | 0 | Out |
14, 15 | 180 | Out |
After initial power up and pin detection, if SYNC IN/OUT is set as auto-detection configuration, the TPSM8S6C24 senses the SYNC pin to determine if there is any external SYNC clock. Switching or a consistent pullup on the SYNC pin sets the device for SYNC_IN while a consistent pulldown on SYNC sets the device for SYNC_OUT. The TPSM8S6C24 devices programmed to be loop followers are always programmed to be SYNC IN.
When configured for SYNC_IN, if SYNC input pulses are missed for two cycles, or the oscillator frequency drops below 50% of the free-running switching frequency, the device determines that SYNC clock is lost. If the TPSM8S6C24 is part of a multi-phase stack, the converter shuts down and remains disabled until a SYNC signal is reestablished to prevent damage due to the loss of synchronization. Single phase standalone devices continues to operate at approximately 50% of the nominal frequency.