SBOSAA3A July   2024  – November 2024 TRF1108

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 AC-Coupled Configuration
      2. 6.3.2 DC-Coupled Configuration
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power-Down Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Thermal Considerations
    2. 7.2 Typical Application
      1. 7.2.1 RF DAC Buffer Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Single-Supply Operation
      2. 7.3.2 Dual-Supply Operation
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RPV|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

Figure 4-1 RPV Package, 12-Pin WQFN-FCRLF (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
INM 5 Input Differential signal input, negative
INP 6 Input Differential signal input, positive
OUT 11 Output Single ended output
PD 2 Input Power-down signal. Supports 1.8V and 3.3V logic referenced to VSS.
0 = Chip enabled
1 = Power down
TP1 8 — Test pin. Connect to VSS
TP2 3 — Test pin. Connect to VSS
TP3 12 — Test pin. Connect to VSS
VDD 9 Power Positive supply pin
VSS 1, 4, 7, 10 Power Negative supply pin
Thermal pad Pad — Thermal pad. Connect to VSS