SLLSEJ1A March   2014  – March 2014 TUSB551

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Terminal Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Supply Electrical Characteristics
    6. 7.6  DC Electrical Characteristics
    7. 7.7  AC Electrical Characteristics
    8. 7.8  Timing Requirements/Timing Diagrams
    9. 7.9  Switching Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Receiver Equalization
      2. 8.3.2 De-Emphasis Control and Output Swing
      3. 8.3.3 Automatic LFPS Detection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Receiver Equalization Settings
      2. 8.4.2 De-Emphasis Control Settings
      3. 8.4.3 Output Swing Control Settings
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Transmit and Receive Channels
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Performance Plot
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage range –0.3 2.3 V
Voltage range at any input or output terminal Differential I/O –0.3 1.5 V
CMOS Inputs –0.3 2.3
TJ Maximum junction temperature 105 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 Handling Ratings

MIN MAX UNIT
TSTG Storage temperature –65 150 °C
ESD Electrostatic discharge Human Body Model (all terminals)(1) ±4 kV
Charged-device model (all terminals)(2) ±1250 V
(1) Tested in accordance with JEDEC Standard 22, Test Method A114-B.
(2) Tested in accordance with JEDEC Standard 22, Test Method C101-A.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Main power supply 1.62 1.8 1.98 V
TA Operating free-air temperature –40 85 °C
CAC AC coupling capacitor 75 100 200 nF

7.4 Thermal Information

THERMAL METRIC(1) TUSB551 UNIT
RWB PACKAGE
12 TERMINALS
θJA Junction-to-ambient thermal resistance(2) 175.2 °C/W
θJCtop Junction-to-case (top) thermal resistance(3) 71.5
θJB Junction-to-board thermal resistance(4) 40.5
ψJT Junction-to-top characterization parameter(5) 2.5
ψJB Junction-to-board characterization parameter(6) 40.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).

7.5 Power Supply Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ICC-ACTIVE Average active current Link in U0 with SuperSpeed data transmission; OS = Low; DE = Low 71.65 mA
Link in U0 with SuperSpeed data transmission; OS = Floating; DE = Low 82.35
ICC-IDLE Average current in idle state Link has some activity, not in U1; OS = Low 35 mA
ICC-U2U3 Average current in U2/U3 Link in U2 or U3 12.20 mA
ICC-NC Average current with no connection No SuperSpeed device is connected to TXP/TXN 4.3 mA

7.6 DC Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
3-State CMOS Inputs (EQ, DE)
VIH High-level input voltage VCC * 0.8 V
VIM Mid-level input voltage VCC / 2 V
VIL Low-level input voltage VCC * 0.2 V
VF Floating voltage VIN = High impedance VCC / 2 V
RPU Internal pull-up resistance 105 kΩ
RPD Internal pull-down resistance 105 kΩ
IIH High-level input current VIN = 1.98V 26 µA
IIL Low-level input current VIN = GND –26 µA
2-State CMOS Inputs (OS)
VIL Low-level input voltage VCC * 0.8 V
VIM Mid-level input voltage VCC/2 V
VF Floating voltage VIN = High Impedance VCC/2 V
RPD Internal pull-down resistance 105 Ω
IIM Mid-level input current 26 µA
IIL Low-level input current VIN = GND -26 µA

7.7 AC Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Differential Receiver (RXP, RXN)
VCM-RX Common-mode voltage bias in the receiver (DC) 0 V
ZRX-DIFF Differential input impedance (DC) Present after a SuperSpeed device is detected on TXP/TXN 72 91 120 Ω
ZRX-CM Common-mode input impedance (DC) Present after a SuperSpeed device is detected on TXP/TXN 18 24 30 Ω
ZRX-HIGH-IMP-DC-POS Common-mode input impedance with termination disabled (DC) Present when no SuperSpeed device is detected on TXP/TXN. Measured over the range of 0-500mV with respect to GND. 25 150 kΩ
VRX-LFPS-DET-DIFF-PP Low Frequency Periodic Signaling (LFPS) detect threshold Below the minimum is squelched. 100 300 mVpp
CRX RX input capacitance to GND At 2.5GHz 400 fF
Differential Transmitter (TXP, TXN)
VTX-DIFF-PP Transmitter differential voltage swing (transition-bit)(1) OS = Low, DE=Low 1050 mVpp
OS = Floating, DE=Low 1200
VTX-DIFF-PP-LFPS LFPS differential voltage swing OS = Low, Floating 800 1200 mVpp
VTX-DE-RATIO Transmitter de-emphasis DE = Low, OS = Floating 0 dB
DE = Floating, OS = Floating –3 –3.5 –4
DE = High, OS = Floating –6
CTX TX input capacitance to GND At 2.5GHz 1.25 pF
ZTX-DIFF Differential impedance of the driver 80 120 Ω
ZTX-CM Common-mode impedance of the driver Measured with respect to AC ground over 0-500mV 20 30 Ω
ITX-SC TX short circuit current TX+/- shorted to GND 60 mA
VCM-TX Common-mode voltage bias in the transmitter (DC) 0.6 0.8 V
VCM-TX-AC AC common-mode voltage swing in active mode Within U0 and within LFPS 100 mVpp
VTX-IDLE-DIFF -AC-PP Differential voltage swing during electrical idle Tested with a high-pass filter 0 10 mVpp
VTX-CM-ΔU1-U0 Absolute delta of DC CM voltage during active and idle states 100 mV
VTX-IDLE-DIFF-DC DC electrical idle differential output voltage Voltage must be low pass filtered to remove any AC component 0 10 mV
Vdetect Voltage change to allow receiver detect Positive voltage to sense receiver termination 600 mV
(1) VTX-DIFF-PP is measured at the TX output with no load and no trace.

7.8 Timing Requirements/Timing Diagrams

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tREADY Time from power applied until RX termination Apply 0V to VCC, connect SuperSpeed termination to TX±, apply 1.8V to VCC, and measure when ZRX-DIFF is enabled. 52 ms
Differential Transmitter (TXP, TXN)
tr, tf Output rise/fall times (see Figure 3) 20%-80% of differential voltage measured 1 inch from the output terminal 56 ps
tRF-MM Output rise/fall time mismatch 20%-80% of differential voltage measured 1 inch from the output terminal 2.6 ps
prop_dly_llsej1.gifFigure 1. Propagation Delay Timing
exit_entry_llsej1.gifFigure 2. Electrical Idle Mode Exit and Entry Delay Timing
RF_times_llsej1.gifFigure 3. Output Rise and Fall Times

7.9 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Differential Transmitter (TXP, TXN)
Tdiff-LH, Tdiff-HL Differential propagation delay times (see Figure 1) De-Emphasis = –3.5dB Propagation delay between 50% level at input and output 278 ps
tidleEntry, tidleExit Idle entry and exit times (see Figure 2) 6 ns

7.10 Typical Characteristics

G1_A_llsej1.gif
Figure 4. No Re-Driver, Trace Length = 16”+3m Cable
G3_A_llsej1.gif
Figure 6. No Re-Driver, Trace Length = 24”+3m Cable
G5_A_llsej1.gif
Figure 8. No Re-Driver, Trace Length = 36"+3m Cable
G2_A_llsej1.gif
Figure 5. After Re-Driver EQ(3dB), Input = 12”,
Output = 4”+3m Cable
G4_A_llsej1.gif
Figure 7. After Re-Driver EQ(6dB), Input = 20”,
Output = 4”+3m Cable
G6_A_llsej1.gif
Figure 9. After Re-Driver De = 3.5dB, EQ = 3dB, Input = 16", Output = 20"+3m Cable