SCES651K June   2006  – October 2023 TXS0104E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: ZXU, YZT, and NMN
    5. 6.5  Thermal Information: D, PW, and RGY
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements: VCCA = 1.8 V ± 0.15 V
    8. 6.8  Timing Requirements: VCCA = 2.5 V ± 0.2 V
    9. 6.9  Timing Requirements: VCCA = 3.3 V ± 0.3 V
    10. 6.10 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    11. 6.11 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    12. 6.12 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    13. 6.13 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Load Circuits
    2. 7.2 Voltage Waveforms
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Power Up
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pullup and Pulldown Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Thermal Information: D, PW, and RGY

THERMAL METRIC(1) TXS0104E UNIT
D
(SOIC)(1)		 PW
(TSSOP)(2)		 RGY
(VQFN)(3)
14 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 90.4 120.1 56.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 50.1 49.4 68.8 °C/W
RθJB Junction-to-board thermal resistance 45.0 61.8 32.1 °C/W
ψJT Junction-to-top characterization parameter 14.4 6.2 3.1 °C/W
ψJB Junction-to-board characterization parameter 44.7 61.2 32.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — 12.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
(3) The package thermal impedance is calculated in accordance with JESD 51-5.