SLUSDD5A April 2019 – December 2020 UC1825B-SP
PRODUCTION DATA
| PARAMETERS | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| REFERENCE | ||||||
| Output voltage | TJ = 25°C, IO = 1 mA | 5.024 | 5.1 | 5.176 | V | |
| Line regulation | 10 V < VCC < 30 V | 2 | 20 | mV | ||
| Load regulation | 1 mA < IO < 10 mA | 5 | 20 | mV | ||
| Total output variation | Line, load, temperature | 5 | 5.2 | V | ||
| Output noise voltage | 10 Hz < f < 10 kHz | 50 | μV | |||
| Short-circuit current | VREF = 0 V | –15 | –50 | –100 | mA | |
| OSCILLATOR SECTION | ||||||
| Initial accuracy | TJ = 25°C | 360 | 400 | 440 | kHz | |
| Voltage stability | 10 V < VCC < 30 V | 0.2% | 2% | |||
| Temperature stability | TMIN < TA < TMAX | 5% | 16% | |||
| Total variation | Line, Temperature | 340 | 460 | kHz | ||
| Clock out high | 3.9 | 4.5 | V | |||
| Clock out low | 2.3 | 2.9 | V | |||
| Ramp peak(1) | 2.6 | 2.8 | 3 | V | ||
| Ramp valley(1) | 0.7 | 1 | 1.25 | V | ||
| Ramp valley to peak(1) | 1.6 | 1.8 | 2.1 | V | ||
| ERROR AMPLIFIER | ||||||
| Input offset voltage | 10 | mV | ||||
| Input bias current | 0.6 | 3 | μA | |||
| Input offset current | 0.1 | 1 | μA | |||
| Open-loop gain | 1 V < VO < 4 V | 60 | 95 | dB | ||
| CMRR | 1.5 V < VCM < 5.5 V | 75 | 95 | dB | ||
| PSRR | 10 V < VCC < 30 V | 85 | 110 | dB | ||
| Output sink current | VE/AOut= 1 V | 1 | 2.5 | mA | ||
| Output source current | VE/AOut = 4 V | –0.5 | –1.3 | mA | ||
| Output high voltage | IE/AOut = –0.5 mA | 4 | 4.7 | 5. | V | |
| Output low voltage | IE/AOut = 1 mA | 0 | 0.5 | 1 | V | |
| Gain bandwidth product(1) | f = 200 kHz | 5 | 10.5 | MHz | ||
| Slew rate(1) | 4 | 9 | V/μs | |||
| PWM COMPARATOR | ||||||
| Ramp bias current | VRamp = 0 V | –1 | –5 | μA | ||
| Duty cycle range | 0% | 80% | ||||
| E/A out zero dc threshold | VRamp = 0 V | 1.1 | 1.25 | V | ||
| Delay to output(1) | 50 | 80 | ns | |||
| SOFT-START | ||||||
| Charge current | VSoft Start = 0.5 V | 3 | 9 | 20 | μA | |
| Discharge current | VSoft Start = 1 V | 1 | mA | |||
| CURRENT LIMIT/SHUTDOWN | ||||||
| Current limit/shutdown bias current | 0 < VILIM/SD < 4 V | 15 | μA | |||
| Current limit threshold | 0.9 | 1 | 1.1 | V | ||
| Shutdown threshold | 1.25 | 1.4 | 1.55 | V | ||
| Delay to output(1) | 50 | 80 | ns | |||
| OUTPUT | ||||||
| Low-level output voltage | IOUT = 20 mA | 0.25 | 0.4 | V | ||
| IOUT = 200 mA | 1.2 | 2.2 | ||||
| High-level output voltage | IOUT = –20 mA | 13 | 13.5 | V | ||
| IOUT = –200 mA | 12 | 13 | ||||
| Collector leakage | VC = 30 V | 10 | 500 | μA | ||
| Rise/fall time(1) | CL = 1 nF | 30 | 75 | ns | ||
| UNDERVOLTAGE LOCKOUT | ||||||
| Start threshold | 8.8 | 9.2 | 9.6 | V | ||
| UVLO hysteresis | 0.4 | 0.8 | 1.2 | V | ||
| SUPPLY CURRENT SECTION | ||||||
| Startup current | VCC = 8 V | 1.1 | 2.5 | mA | ||
| ICC | VINV = VRamp = VILIM/SD = 0 V, VNI = 1 V | 22 | 33 | mA | ||