SLUSDD5A April   2019  – December 2020 UC1825B-SP

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Methods
      2. 7.3.2 Synchronization
      3. 7.3.3 High Current Outputs
      4. 7.3.4 Open Loop Test Circuit
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 System Design Theory
        1. 8.2.1.1 Switching Frequency
        2. 8.2.1.2 Transformer
        3. 8.2.1.3 RCD and Diode Clamp
        4. 8.2.1.4 Output Diode
        5. 8.2.1.5 Main Switching MOSFETs
        6. 8.2.1.6 Output Filter and Capacitance
        7. 8.2.1.7 Compensation
        8. 8.2.1.8 Sense Resistor
    3. 8.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Feedback Traces
      2. 10.1.2 Input/Output Capacitors
      3. 10.1.3 Compensation Components
      4. 10.1.4 Traces and Ground Planes
      5. 10.1.5 Ground Planes
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

Unless otherwise stated, these specifications apply for RT = 3.65 kΩ, CT = 1 nF, VCC = 15 V, –55°C < TA < 125°C, TA = TJ
PARAMETERSTEST CONDITIONSMINTYPMAXUNIT
REFERENCE
Output voltageTJ = 25°C, IO = 1 mA5.0245.15.176V
Line regulation10 V < VCC < 30 V220mV
Load regulation1 mA < IO < 10 mA520mV
Total output variationLine, load, temperature55.2V
Output noise voltage10 Hz < f < 10 kHz50μV
Short-circuit currentVREF = 0 V–15–50–100mA
OSCILLATOR SECTION
Initial accuracyTJ = 25°C360400440kHz
Voltage stability10 V < VCC < 30 V0.2%2%
Temperature stabilityTMIN < TA < TMAX5%16%
Total variationLine, Temperature340460kHz
Clock out high3.94.5V
Clock out low2.32.9V
Ramp peak(1)2.62.83V
Ramp valley(1)0.711.25V
Ramp valley to peak(1)1.61.82.1V
ERROR AMPLIFIER
Input offset voltage10mV
Input bias current0.63μA
Input offset current0.11μA
Open-loop gain1 V < VO < 4 V6095dB
CMRR1.5 V < VCM < 5.5 V7595dB
PSRR10 V < VCC < 30 V85110dB
Output sink currentVE/AOut= 1 V12.5mA
Output source currentVE/AOut = 4 V–0.5–1.3mA
Output high voltageIE/AOut = –0.5 mA44.75.V
Output low voltageIE/AOut = 1 mA00.51V
Gain bandwidth product(1)f = 200 kHz510.5MHz
Slew rate(1)49V/μs
PWM COMPARATOR
Ramp bias currentVRamp = 0 V–1–5μA
Duty cycle range0%80%
E/A out zero dc thresholdVRamp = 0 V1.11.25V
Delay to output(1)5080ns
SOFT-START
Charge currentVSoft Start = 0.5 V3920μA
Discharge currentVSoft Start = 1 V1mA
CURRENT LIMIT/SHUTDOWN
Current limit/shutdown bias current0 < VILIM/SD < 4 V15μA
Current limit threshold0.911.1V
Shutdown threshold1.251.41.55V
Delay to output(1)5080ns
OUTPUT
Low-level output voltageIOUT = 20 mA0.250.4V
IOUT = 200 mA1.22.2
High-level output voltageIOUT = –20 mA1313.5V
IOUT = –200 mA1213
Collector leakageVC = 30 V10500μA
Rise/fall time(1)CL = 1 nF3075ns
UNDERVOLTAGE LOCKOUT
Start threshold8.89.29.6V
UVLO hysteresis0.40.81.2V
SUPPLY CURRENT SECTION
Startup currentVCC = 8 V1.12.5mA
ICCVINV = VRamp = VILIM/SD = 0 V, VNI = 1 V2233mA
Parameters ensured by design and/or characterization, if not production tested.