SGLS164A April 2003 – October 2024 UC2842AQ , UC2843AQ , UC2845AQ
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors must be connected close to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converters requiring duty cycles over 50%. Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes.