SLUSDO2D June 2020 – August 2024 UCC21540-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The UCC21540-Q1 output stage features a pull-up structure which delivers the highest peak-source current when it is most needed: during the Miller plateau region of the power-switch turn on transition (when the power switch drain or collector voltage experiences dV/dt). The output stage pull-up structure features a P-channel MOSFET and an additional pull-up N-channel MOSFET in parallel. The function of the N-channel MOSFET is to provide a boost in the peak-sourcing current, enabling fast turn on. This is accomplished by briefly turning on the N-channel MOSFET during a narrow instant when the output is changing states from low to high.
The ROH parameter is a DC measurement and it is representative of the on-resistance of the P-channel device only. This is because the pull-up N-channel device is held in the off state in DC condition and is turned on only for a brief instant when the output is changing states from low to high. Therefore the effective resistance of the UCC21540-Q1 pull-up stage during this brief turn-on phase is much lower than what is represented by the ROH parameter.
The pull-down structure of the UCC21540-Q1 is composed of an N-channel MOSFET. The ROL parameter, which is also a DC measurement, is representative of the impedance of the pull-down state in the device. The output voltage swings between VDD and VSS for rail-to-rail operation.
To ensure robust and reliable operation of gate drivers, pay special attention to the minimum pulse width. The minimum pulse width shown in the electrical characteristics table describes the minimum input pulse that would be passed to the output in an unloaded driver. This is dictated by the deglitch filter present in the driver IC. An input ON or OFF pulse width longer than the maximum specification is needed to guarantee an output state change and avoid potential shoot-through. With a loaded driver, extra precaution must be taken to ensure robust operation of the system. During gate switching, if the output state changes before the driver completes each transition, a non-zero current switching event occurs. Combined with layout parasitics, non-zero current switching can cause internal rail overshoot and EOS damage of the gate driver. Thus, a minimum output width is needed for reliable system operation. This minimum output pulse width is dependent on several factors: gate capacitance, VDD supply voltage, gate resistance, and PCB layout parasitics. The minimum pulse width for robust operation might be magnitudes larger than the minimum pulse width shown in the electrical characteristics table. System-level study should be carried out to determine the minimum output pulse width required for each system.