SLUSD43B august   2020  – may 2023 UCC21710

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Propagation Delay
      1. 7.1.1 Non-Inverting and Inverting Propagation Delay
    2. 7.2 Input Deglitch Filter
    3. 7.3 Active Miller Clamp
      1. 7.3.1 Internal Active Miller Clamp
    4. 7.4 Under Voltage Lockout (UVLO)
      1. 7.4.1 VCC UVLO
      2. 7.4.2 VDD UVLO
    5. 7.5 OC (Over Current) Protection
      1. 7.5.1 OC Protection with Soft Turn-OFF
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power Supply
      2. 8.3.2  Driver Stage
      3. 8.3.3  VCC and VDD Undervoltage Lockout (UVLO)
      4. 8.3.4  Active Pulldown
      5. 8.3.5  Short Circuit Clamping
      6. 8.3.6  Internal Active Miller Clamp
      7. 8.3.7  Overcurrent and Short Circuit Protection
      8. 8.3.8  Soft Turn-off
      9. 8.3.9  Fault ( FLT, Reset and Enable ( RST/EN)
      10. 8.3.10 Isolated Analog to PWM Signal Function
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input filters for IN+, IN- and RST/EN
        2. 9.2.2.2 PWM Interlock of IN+ and IN-
        3. 9.2.2.3 FLT, RDY and RST/EN Pin Circuitry
        4. 9.2.2.4 RST/EN Pin Control
        5. 9.2.2.5 Turn on and turn off gate resistors
        6. 9.2.2.6 Overcurrent and Short Circuit Protection
          1. 9.2.2.6.1 Protection Based on Power Modules with Integrated SenseFET
          2. 9.2.2.6.2 Protection Based on Desaturation Circuit
          3. 9.2.2.6.3 Protection Based on Shunt Resistor in Power Loop
        7. 9.2.2.7 Isolated Analog Signal Sensing
          1. 9.2.2.7.1 Isolated Temperature Sensing
          2. 9.2.2.7.2 Isolated DC Bus Voltage Sensing
        8. 9.2.2.8 Higher Output Current Using an External Current Buffer
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.9 Fault ( FLT, Reset and Enable ( RST/EN)

The FLT pin of UCC21710 is open drain and can report a fault signal to the DSP/MCU when the fault is detected through the OC pin. The FLT pin will be pulled down to GND after the fault is detected, and is held low until a reset signal is received from RST/EN. The device has a fault mute time tFLTMUTE, within which the device ignores any reset signal.

The RST/EN is pulled down internally by a 50kΩ resistor, and is thus disabled by default when this pin is floating. It must be pulled up externally to enable the driver. The pin has two purposes:

  • To reset the FLT pin. To reset, then RST/EN pin is pulled low; if the pin is set and held in low state for more than tRSTFIL after the mute time tFLTMUTE, then the fault signal is reset and FLT is reset back to the high impedance status at the rising edge of the input signal at RST/EN pin.
  • Enable and shutdown the device. If the RST/EN pin is pulled low for longer than tRSTFIL, the driver will be disabled and OUTL will be activated to pull down the gate of the IGBT or SiC MOSFET. The pin must be pulled up externally to enable the part, otherwise the device is disabled by default.