SLUSDH9D
September 2019 – November 2023
UCC21750-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety Limiting Values
6.8
Electrical Characteristics
6.9
Safety-Related Certifications
6.10
Switching Characteristics
6.11
Insulation Characteristics Curves
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Propagation Delay
7.1.1
Regular Turn-OFF
7.2
Input Deglitch Filter
7.3
Active Miller Clamp
7.3.1
Internal On-Chip Active Miller Clamp
7.4
Undervoltage Lockout (UVLO)
7.4.1
VCC UVLO
7.4.2
VDD UVLO
7.5
Desaturation (DESAT) Protection
7.5.1
DESAT Protection with Soft Turn-OFF
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power Supply
8.3.2
Driver Stage
8.3.3
VCC and VDD Undervoltage Lockout (UVLO)
8.3.4
Active Pulldown
8.3.5
Short Circuit Clamping
8.3.6
Internal Active Miller Clamp
8.3.7
Desaturation (DESAT) Protection
8.3.8
Soft Turn-Off
8.3.9
Fault (FLT, Reset, and Enable (RST/EN)
8.3.10
Isolated Analog to PWM Signal Function
8.4
Device Functional Modes
9
Applications and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Input Filters for IN+, IN–, and RST/EN
9.2.2.2
PWM Interlock of IN+ and IN–
9.2.2.3
FLT, RDY, and RST/EN Pin Circuitry
9.2.2.4
RST/EN Pin Control
9.2.2.5
Turn-On and Turn-Off Gate Resistors
9.2.2.6
Overcurrent and Short Circuit Protection
9.2.2.7
Isolated Analog Signal Sensing
9.2.2.7.1
Isolated Temperature Sensing
9.2.2.7.2
Isolated DC Bus Voltage Sensing
9.2.2.8
Higher Output Current Using an External Current Buffer
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DW|16
MSOI003I
Thermal pad, mechanical data (Package|Pins)
DW|16
QFND505A
Orderable Information
slusdh9d_oa
slusdh9d_pm
1
Features
5.7-kV
RMS
single channel isolated gate driver
AEC-Q100 qualified for automotive applications
Device temperature grade 1: -40°C to +125°C ambient operating temperature range
Device HBM ESD classification level 3A
Device CDM ESD classification level C3
SiC MOSFETs and IGBTs up to 2121V
pk
33-V maximum output drive voltage (VDD – VEE)
±10-A drive strength and split output
150-V/ns minimum CMTI
200-ns response time fast DESAT protection
4-A Internal active miller clamp
400-mA soft turn-off when fault happens
Isolated analog sensor with PWM output for
Temperature sensing with NTC, PTC or thermal diode
High voltage DC-link or phase voltage
Alarm
FLT
on overcurrent and reset from
RST
/EN
Fast enable and disable response on
RST
/EN
Reject < 40-ns noise transient and pulse on input pins
12-V VDD UVLO with power good on RDY
Inputs/outputs with over/under-shoot transient voltage immunity up to 5 V
130-ns (maximum) propagation delay and 30-ns (maximum) pulse/part skew
SOIC-16 DW package with creepage and clearance distance > 8 mm
Operating junction temperature –40°C to 150°C
Safety-related certifications:
Reinforced insulation per DIN EN IEC 60747-17 (VDE 0884-17)
UL 1577 component recognition program