SLUSA87C August   2010  – October 2015 UCC24610

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Normal Operation
      2. 7.3.2 Light-Load Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 UVLO Mode
      2. 7.4.2 Sleep Mode
      3. 7.4.3 Run Mode
      4. 7.4.4 Light-Load Mode
      5. 7.4.5 Fault Mode and Other Protections
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VD and VS Detection
        2. 8.2.2.2 Enabling and TOFF Programming
        3. 8.2.2.3 TON Programming
        4. 8.2.2.4 GATE Drive and RGATE Considerations
        5. 8.2.2.5 VCC Range and Bypassing Considerations
        6. 8.2.2.6 SYNC Input Considerations
          1. 8.2.2.6.1 Determine the Minimum Change
          2. 8.2.2.6.2 After the ΔVDS_PRI Transition
          3. 8.2.2.6.3 The Value of CCM
          4. 8.2.2.6.4 Conservative Power-Loss Estimates
          5. 8.2.2.6.5 The Device Internal SYNC-to-GATE Delay Time
          6. 8.2.2.6.6 The CSYNC Capacitor Resets
        7. 8.2.2.7 Single-Fault Self-Protection Features
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

The printed circuit board (PCB) requires conscientious layout to minimize current loop areas and track lengths, especially when using single-sided PCBs.

  • Place a ceramic MLCC bypass capacitor as close as possible to VCC and GND.
  • Avoid connecting VD and VS sense points at locations where stray inductance is added to the SR MOSFET package inductance, as this will tend to turn off the SR prematurely.
  • Run a track from the VD pin directly to the MOSFET drain pad to avoid sensing voltage across the stray inductance in the SR drain current path. Include an RVD component option in series with the VD pin unless previous testing has shown that it is not necessary.
  • Run a track from the VS pin directly to the MOSFET source pad to avoid sensing voltage across the stray inductance in the SR source current path. Do not simply connect VS to the controller GND pin. Include an RVS component option in series with the VS pin unless previous testing has shown that it is not necessary.
  • Run parallel tracks from GATE and GND to the SR MOSFET. Include a series gate resistance to dampen ringing.

10.2 Layout Example

UCC24610 layout_lusa87.gif Figure 34. Single-Sided PCB Layout Using a TO-220 MOSFET