SLUSD60 October   2017 UCC256304

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Hybrid Hysteretic Control
      2. 7.3.2  Regulated 12-V Supply
      3. 7.3.3  Feedback Chain
      4. 7.3.4  Optocoupler Feedback Signal Input and Bias
      5. 7.3.5  System External Shut Down
      6. 7.3.6  Pick Lower Block and Soft Start Multiplexer
      7. 7.3.7  Pick Higher Block and Burst Mode Multiplexer
      8. 7.3.8  VCR Comparators
      9. 7.3.9  Resonant Capacitor Voltage Sensing
      10. 7.3.10 Resonant Current Sensing
      11. 7.3.11 Bulk Voltage Sensing
      12. 7.3.12 Output Voltage Sensing
      13. 7.3.13 High Voltage Gate Driver
      14. 7.3.14 Protections
        1. 7.3.14.1 ZCS Region Prevention
        2. 7.3.14.2 Over Current Protection (OCP)
        3. 7.3.14.3 Over Output Voltage Protection (VOUTOVP)
        4. 7.3.14.4 Over Input Voltage Protection (VINOVP)
        5. 7.3.14.5 Under Input Voltage Protection (VINUVP)
        6. 7.3.14.6 Boot UVLO
        7. 7.3.14.7 RVCC UVLO
        8. 7.3.14.8 Over Temperature Protection (OTP)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Burst Mode Control
      2. 7.4.2 High Voltage Start-Up
      3. 7.4.3 X-Capacitor Discharge
      4. 7.4.4 Soft-Start and Burst-Mode Threshold
      5. 7.4.5 System States and Faults State Machine
      6. 7.4.6 Waveform Generator State Machine
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  LLC Power Stage Requirements
        3. 8.2.2.3  LLC Gain Range
        4. 8.2.2.4  Select Ln and Qe
        5. 8.2.2.5  Determine Equivalent Load Resistance
        6. 8.2.2.6  Determine Component Parameters for LLC Resonant Circuit
        7. 8.2.2.7  LLC Primary-Side Currents
        8. 8.2.2.8  LLC Secondary-Side Currents
        9. 8.2.2.9  LLC Transformer
        10. 8.2.2.10 LLC Resonant Inductor
        11. 8.2.2.11 LLC Resonant Capacitor
        12. 8.2.2.12 LLC Primary-Side MOSFETs
        13. 8.2.2.13 Design Considerations for Adaptive Dead-Time
        14. 8.2.2.14 LLC Rectifier Diodes
        15. 8.2.2.15 LLC Output Capacitors
        16. 8.2.2.16 HV Pin Series Resistors
        17. 8.2.2.17 BLK Pin Voltage Divider
        18. 8.2.2.18 BW Pin Voltage Divider
        19. 8.2.2.19 ISNS Pin Differentiator
        20. 8.2.2.20 VCR Pin Capacitor Divider
        21. 8.2.2.21 Burst Mode Programming
        22. 8.2.2.22 Soft-Start Capacitor
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 VCC Pin Capacitor
    2. 9.2 Boot Capacitor
    3. 9.3 RVCC Pin Capacitor
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support (if applicable)
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Specifications

Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted), all voltageages are with respect to GND, currents are positive into and negative out of the specified terminal.(1)
MIN MAX UNIT
Input voltage HV, HB –0.3 640 V
BLK, FB, LL/SS –0.3 7 V
VCR –0.3 7 V
HB - HS –0.3 17 V
VCC –0.3 30 V
BW, ISNS –5 7 V
RVCC output voltage DC –0.3 17 V
HO output voltage DC HS – 0.3 HB + 0.3 V
Transient, less than 100ns HS – 2 HB + 0.3
LO output voltage DC –0.3 RVCC + 0.3 V
Transient, less than 100ns –2 RVCC + 0.3
Floating ground slew rate dVHS/dt –50 50 V/ns
HO, LO pulsed current IOUT_PULSED –0.6 1.2 A
Junction temperature range TJ –40 150 °C
Storage temperature range, Tstg Tstg –65 150
Lead temperature Soldering, 10 second 300
Reflow 260
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, high voltage pins(1) ±1000 V
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all other pins(1) ±2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

All voltages are with respect to GND, –40°C < TJ = TA < 125°C, currents are positive into and negative out of the specified terminal, unless otherwise noted.
MIN NOM MAX UNIT
HV, HS Input voltage 600 V
VCC Supply voltage 13 15 26 V
HB - HS Driver bootstrap voltage 10 12 16 V
CB Ceramic bypass capacitor from HB to HS 0.1 5 µF
CRVCC RVCC pin decoupling capacitor 4.7 µF
IRVCCMAX Maximum output current of RVCC (1) 100 mA
TA Operating ambient temperature -40 125 °C
Not production tested. Specified by characterization

Thermal Information

THERMAL METRIC(1) UCC256304 UNIT
D (SOIC)
14 PINS
RθJA Junction-to-ambient thermal resistance 74.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 30.7 °C/W
RθJB Junction-to-board thermal resistance 31.8 °C/W
ΨJT Junction-to-top characterization parameter 4.4 °C/W
ΨJB Junction-to-board characterization parameter 31.4 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

Electrical Characteristics

All voltages are with respect to GND, –40°C < TJ = TA < 125°C, VCC = 15 V, currents are positive into and negative out of the specified terminal, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
VCCShort Below this threshold, use reduced start up current 0.5 0.6 0.7 V
VCCReStartJfet Below this threshold, re-enable JFET. 10.2 10.5 10.8 V
VCCStartSelf In self bias mode, gate starts switching above this level 25 26 28 V
SUPPLY CURRENT
ICCSleep Current drawn from VCC rail during burst off period VCC = 15V 475 565 700 µA
ICCRun Current drawn from VCC Pin while gate is switching. Excluding Gate Current VCC = 15V, maximum dead time 1.75 2.2 2.65 mA
REGULATED SUPPLY
VRVCC Regulated supply voltage VCC = 15V 11.60 12 12.40 V
VCC = 13V 11.2 11.8 12.25 V
VRVCCUVLO RVCC under voltage lock out voltage (1) 7 V
HIGH VOLTAGE STARTUP
IHVLow Reduced startup pin current 0.28 0.41 0.54 mA
IHVHigh Full startup pin current 7.6 10.20 12.6 mA
IHVLeak HV current source leakage current 1.40 3.37 7.55 µA
IHVZCD Highest AC zero crossing detection test current 0.63 0.77 0.89 mA
IXCAPDischarge X-cap discharge current 9.6 11.47 13.5 mA
tXCAPZCD AC zero crossing detection window length for first three test current stage (1) 10 11.85 14 ms
tXCAPZCDLast AC zero crossing detection window length for final test current stage (1) 43 46 52 ms
tXCAPIdle AC zero crossing detection idle period length (1) 635 704 772 ms
tXCAPDischarge Time for X-cap discharge current active (1) 327 358 390 ms
BULK VOLTAGE SENSE
VBLKStart Input voltage that allows LLC to start switching Voltage rising 1.01 1.04 1.08 V
VBLKStop Input voltage that forces LLC operation to stop Voltage falling 0.83 0.87 0.93 V
VBLKOVRise Input voltage that causes switching to stop Voltage rising 4.92 5.03 5.12 V
VBLKOVFall Input voltage that causes switching to re-start Voltage falling 3.67 3.76 3.86 V
FEEDBACK PIN
RFBInternal Internal pull down resistor value 90.7 101.5 112.3
IFB FB internal current source 76.5 85.1 93.6 µA
f-3dB Feedback chain -3dB cut off frequency (2) 1 MHz
RESONANT CURRENT SENSE
VISNS_OCP1 OCP1 threshold 3.97 4.03 4.07 V
VISNS_OCP1_SS OCP1 threshold during soft start (1) 5 V
VISNS_OCP2 OCP2 threshold 0.68 0.84 0.99 V
VISNS_OCP3 OCP3 threshold 0.49 0.64 0.79 V
TISNS_OCP2 The time the average input current needs to stay above OCP2 threshold before OCP2 is triggered (1) 2 ms
TISNS_OCP3 The time the average input current needs to stay above OCP3 threshold before OCP3 is triggered (1) 50 ms
VIpolarityHyst Resonant current polarity detection hysteresis 16.9 30.7 44.7 mV
nOCP1 Number of OCP1 cycles before OCP1 fault is tripped (1) 4
RESONANT CAPACITOR VOLTAGE SENSE
VCM Internal common mode voltage 2.91 3.02 3.14 V
IRAMP Frequency compensation ramp current source value 1.63 1.84 2.10 mA
IMismatch Pull up and pull down ramp current source mismatch (3) -1.25 1.25 %
SOFT START
ISSUp Current output from SS pin to charge up the soft start capacitor 21.8 25.8 29.8 µA
RSSDown SS pin pull down resistance
ZCS or OCP1 222 401 580 Ω
GATE DRIVER
VLOL LO output low voltage Isink = 20 mA 0.027 0.052 0.087 V
VRVCC - VLOH LO output high voltage Isource = 20 mA 0.113 0.178 0.263 V
VHOL - VHS HO output low voltage Isink = 20 mA 0.027 0.053 0.087 V
VHB - VHOH HO output high voltage Isource = 20 mA 0.113 0.173 0.263 V
VHB-HSUVLORise High side gate driver UVLO rise threshold 7.35 7.94 8.70 V
VHB-HSUVLOFall High side gate driver UVLO fall threshold 6.65 7.25 7.76 V
Isource_pk HO, LO peak source current (2) -0.6 A
Isink_pk HO, LO peak sink current (2) 1.2 A
BOOTSTRAP
IBOOT_QUIESCENT (HB - HS) quiescent current HB - HS = 12 V 51.10 74.40 97.70 µA
IBOOT_LEAK HB to GND leakage current 0.02 0.40 5.40 µA
tChargeBoot Length of charge boot state 234 267 296 µs
BIAS WINDING
VBWOVRise Output voltage OVP -4.1 -3.97 -3.86 V
BURST MODE
RLL LL voltage scaling resistor value 240 250 258
ADAPTIVE DEADTIME
dVHS/dt Detectable PSN slew rate (1) ±1 ±50 V/ns
FAULT RECOVERY
tPauseTimeOut Paused timer (1) 1 s
THERMAL SHUTDOWN
TJ_r Thermal shutdown temperature (1) Temperature rising 125 145 °C
TJ_H Thermal shutdown hsyterisis (1) 20 °C
Not production tested. Specified by characterization.
NNot production tested. Specified by design.
IMismatch calculated as average of (IPD-(IPD+IPU)/(IPD+IPU)/2)) and (IPU-(IPD+IPU)/((IPD+IPU)/2)

Switching Characteristics

All voltages are with respect to GND, –40°C < TJ = TA < 125°C, VCC = 12 V, currents are positive into and negative out of the specified terminal, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr(LO) Rise time 10% to 90%, 1-nF load 18 35 50 ns
tf(LO) Fall time 10% to 90%, 1-nF load 15 25 50 ns
tr(HO) Rise time 10% to 90%, 1-nF load 18 35 50 ns
tf(HO) Fall time 10% to 90%, 1-nF load 15 25 50 ns
tDT(min) Minimum dead time (1) 100 ns
tDT(max) Maximum dead time (dead time fault) (1) 150 µs
tON(min) Minimum gate on time (1) 250 ns
tON(max) Maximum gate on time (1) 14.5 µs
Not production tested. Specified by characterization.

Typical Characteristics

UCC256304 D001_SLUSCU6.gif
Figure 1. IHVHigh vs Temperature
UCC256304 D003_SLUSCU6.gif
Figure 3. IHVLeak vs Temperature
UCC256304 D005_SLUSCU6.gif
Figure 5. IBOOT_LEAK vs Temperature
UCC256304 D007_SLUSCU6.gif
Figure 7. IMISMATCH vs Temperature
UCC256304 D009_SLUSCU6.gif
Figure 9. VRVCC vs Temperature
UCC256304 D0011_SLUSCU6.gif
Figure 11. iCCSleep vs Temperature
UCC256304 D0013_SLUSCU6.gif
Figure 13. VCM vs Temperature
UCC256304 D0015_SLUSCU6.gif
Figure 15. IFB vs Temperature
UCC256304 D0017_SLUSCU6.gif
Figure 17. RSSDown vs Temperature
UCC256304 D0019_SLUSCU6.gif
Figure 19. IHVZCD vs Temperature
UCC256304 D0021_SLUSCU6.gif
Figure 21. IHB-HSUVLOFall vs Temperature
UCC256304 D0023_SLUSCU6.gif
Figure 23. VRVCC-VLOH vs Temperature
UCC256304 D0025_SLUSCU6.gif
Figure 25. VHB - VHOH vs Temperature
UCC256304 D0027_SLUSCU6.gif
Figure 27. VCCReStartJfet vs Temperature
UCC256304 D002_SLUSCU6.gif
Figure 2. IHVLow vs Temperature
UCC256304 D004_SLUSCU6.gif
Figure 4. IBOOT_QUIESCENT vs Temperature
UCC256304 D006_SLUSCU6.gif
Figure 6. IRAMP vs Temperature
UCC256304 D008_SLUSCU6.gif
Figure 8. RLL vs Temperature
UCC256304 D0010_SLUSCU6.gif
Figure 10. VRVCC vs Temperature
UCC256304 D0012_SLUSCU6.gif
Figure 12. ICCRun vs Temperature
UCC256304 D0014_SLUSCU6.gif
Figure 14. RFB vs Temperature
UCC256304 D0016_SLUSCU6.gif
Figure 16. ISSUp vs Temperature
UCC256304 D0018_SLUSCU6.gif
Figure 18. IXCAPDischarge vs Temperature
UCC256304 D0020_SLUSCU6.gif
Figure 20. IHB-HSUVLORise vs Temperature
UCC256304 D0022_SLUSCU6.gif
Figure 22. VLOL vs Temperature
UCC256304 D0024_SLUSCU6.gif
Figure 24. VHOL- VHS vs Temperature
UCC256304 D0026_SLUSCU6.gif
Figure 26. VCCStartself vs Temperature