SLUSAF9C February   2011  – July 2024 UCC27200A , UCC27201A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stages
      2. 6.3.2 UVLO (Undervoltage Lockout)
      3. 6.3.3 Level Shift
      4. 6.3.4 Boot Diode
      5. 6.3.5 Output Stages
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Threshold Type
        2. 7.2.2.2 VDD Bias Supply Voltage
        3. 7.2.2.3 Peak Source and Sink Currents
        4. 7.2.2.4 Propagation Delay
        5. 7.2.2.5 Power Dissipation
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) UCC27200A/UCC27201A UCC27201A UNIT
D (SOIC) DDA (PowerPad™ SOIC) DRM (VSON) DRC (VSON) DPR (WSON)
8 Pins 8 Pins 8 Pins 9 Pins 10 PINS
RθJA Junction-to-ambient thermal resistance 112.5 47.1 46.2 52.1 46.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 52.1 60.8 41.1 57.9 36.7 °C/W
RθJB Junction-to-board thermal resistance 59.6 21.3 21.3 22.6 22.1 °C/W
ψJT Junction-to-top characterization parameter 7 6.3 1.3 1.6 0.9 °C/W
ψJB Junction-to-board characterization parameter 58.7 21.3 21.2 22.6 22 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance - 6.2 9.1 9 9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.