SLUSCZ8A
July 2017 – July 2024
UCC27212A-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Timing Diagrams
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Input Stages
6.3.2
Undervoltage Lockout (UVLO)
6.3.3
Level Shift
6.3.4
Boot Diode
6.3.5
Output Stages
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Power Dissipation
7.2.3
Application Curves
8
Power Supply Recommendations
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
9.2.1
Thermal Considerations
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDA|8
MPDS092F
Thermal pad, mechanical data (Package|Pins)
1
Features
AEC-Q100 qualified for automotive applications: device temperature grade 1
–40°C to +150°C junction temperature range
5V turn-off Under Voltage Lockout (UVLO)
Drives two N-channel MOSFETs in high-side and low-side configuration with independent inputs
Maximum boot voltage 120V DC
3.7A source, 4.5A sink output currents
Input pins can tolerate –10V to +20V and are independent of supply voltage range
TTL compatible Inputs
7V to 17V VDD operating range, (20V ABS maximum)
7.2ns rise and 5.5ns fall time with 1000pF load
Fast propagation delay times (20ns typical)
4ns typical delay matching
Available in the SOIC8 (PowerPAD) package