SLUSDN5D September   2019  – October 2022 UCC27282-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Start-up and UVLO
      3. 7.3.3 Input Stages and Interlock
      4. 7.3.4 Level Shifter
      5. 7.3.5 Output Stage
      6. 7.3.6 Negative Voltage Transients
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 Estimate Driver Power Losses
        3. 8.2.2.3 Selecting External Gate Resistor
        4. 8.2.2.4 Delays and Pulse Width
        5. 8.2.2.5 External Bootstrap Diode
        6. 8.2.2.6 VDD and Input Filter
        7. 8.2.2.7 Transient Protection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
      1.      Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

VDD = VHB = VEN =12 V, VHS = VSS = 0 V, No load on LO or HO, TJ = –40°C to +150°C, (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENTS
IDDVDD quiescent currentVLI = VHI = 00.30.4mA
IDDOVDD operating currentf = 500 kHz, CLOAD = 02.24.5mA
IHBHB quiescent currentVLI = VHI = 0 V0.20.4mA
IHBOHB operating currentf = 500 kHz, CLOAD = 02.54mA
IHBSHB to VSS quiescent currentVHS = VHB = 100 V5.050μA
IHBSOHB to VSS operating current(1)f = 500 kHz, CLOAD = 00.1mA
IDD_DISIDD when driver is disabledVEN = 07.0μA
INPUT
VHITInput rising threshold1.92.12.4V
VLITInput falling threshold0.91.11.3V
VIHYSInput voltage Hysteresis1.0V
RINInput pulldown resistance100250350kΩ
ENABLE
VENVoltage threshold on EN pin to enable the driver1.542.0V
VDISVoltage threshold on EN pin to disable the driver0.71.21V
VENHYSEnable pin Hysteresis0.3V
RENEN pin internal pull-down resistor250kΩ
TENTime to enable the driver once the EN pin is pulled highVEN = 2V18μs
TDISTime to disable the driver once the EN pin is pulled lowVEN = 0V1.5μs
UNDERVOLTAGE LOCKOUT PROTECTION (UVLO)
VDDRVDD rising threshold4.75.05.4V
VDDFVDD falling threshold4.24.54.9V
VDDHYSVDD threshold hysteresis0.5V
VHBRHB rising threshold with respect to HS pin3.33.74.7V
VHBFHB falling threshold with respect to HS pin3.03.34.4V
VHBHYSHB threshold hysteresis0.3V
BOOTSTRAP DIODE
VFLow-current forward voltageIVDD-HB = 100 μA0.550.85V
VFIHigh-current forward voltageIVDD-HB = 80 mA0.881.1V
RDDynamic resistance, ΔVF/ΔIIVDD-HB = 100 mA and 80 mA1.52.5
LO GATE DRIVER
VLOLLow level output voltageILO = 100 mA0.0850.4V
VLOHHigh level output voltageILO = -100 mA, VLOH = VDD – VLO0.130.42V
Peak pullup current (1)VLO = 0 V3.0A
Peak pulldown current (1)VLO = 12 V3.0A
HO GATE DRIVER
VHOLLow level output voltageIHO = 100 mA0.10.4V
VHOHHigh level output voltageIHO = –100 mA, VHOH = VHB- VHO0.130.42V
Peak pullup current (1)VHO = 0 V3.0A
Peak pulldown current (1)VHO = 12 V3.0A
Parameter not tested in production