SLUSE21B June   2020  – April 2022 UCC27288

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-up and UVLO
      2. 7.3.2 Input Stages
      3. 7.3.3 Level Shifter
      4. 7.3.4 Output Stage
      5. 7.3.5 Negative Voltage Transients
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 External Bootstrap Diode and Series Resistor
        3. 8.2.2.3 Estimate Driver Power Losses
        4. 8.2.2.4 Selecting External Gate Resistor
        5. 8.2.2.5 Delays and Pulse Width
        6. 8.2.2.6 VDD and Input Filter
        7. 8.2.2.7 Transient Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.1 Select Bootstrap and VDD Capacitor

The bootstrap capacitor must maintain the VHB-HS voltage above the UVLO threshold for normal operation. Calculate the maximum allowable drop across the bootstrap capacitor, ΔVHB, with Equation 1.

Equation 1. GUID-A3A72C7C-558E-4C75-AA94-2C7166034B55-low.gif

where

  • VDD is the supply voltage of gate driver device
  • VDH is the bootstrap diode forward voltage drop
  • VHBL is the HB falling threshold ( VHBR(max) – VHBH)

In this example the allowed voltage drop across bootstrap capacitor is 2.4 V.

It is generally recommended that ripple voltage on both the bootstrap capacitor and VDD capacitor should be minimized as much as possible. Many of commercial, industrial, and automotive applications use ripple value of 0.5 V.

Use Equation 2 to estimate the total charge needed per switching cycle from bootstrap capacitor.

Equation 2. GUID-570D5C7A-9E61-4125-8C86-2B6B28747DEE-low.gif

where

  • QG is the total MOSFET gate charge
  • IHBS is the HB to VSS leakage current from datasheet
  • DMax is the converter maximum duty cycle
  • IHB is the HB quiescent current from the datasheet

The caculated total charge is 53.41 nC.

Next, use Equation 3 to estimate the minimum bootstrap capacitor value.

Equation 3. GUID-33557E56-36C3-400F-8C8A-22FD028112CD-low.gif

The calculated value of minimum bootstrap capacitor is 22.25 nF. It should be noted that, this value of capacitance is needed at full bias voltage. In practice, the value of the bootstrap capacitor must be greater than calculated value to allow for situations where the power stage may skip pulse due to various transient conditions. It is recommended to use a 100-nF bootstrap capacitor in this example. It is also recommenced to include enough margin and place the bootstrap capacitor as close to the HB and HS pins as possible. Also place a small size, 0402, low value, 1000 pF, capacitor to filter high frequency noise, in parallel with main bypass capacitor.

For this application, choose a CBOOT capacitor that has the following specifications: 0.1 µF, 25 V, X7R

As a general rule the local VDD bypass capacitor must be greater than the value of bootstrap capacitor value (generally 10 times the bootstrap capacitor value). For this application choose a CVDD capacitor with the following specifications: 1 µF , 25 V, X7R

CVDD capacitor is placed across VDD and VSS pin of the gate driver. Similar to bootstrap capacitors, place a small size and low value capacitor in parallel with the main bypass capacitor. For this application, choose 0402, 1000 pF, capacitance in parallel with main bypass capacitor to filter high frequency noise.

The bootstrap and bias capacitors must be ceramic types with X7R dielectric or better. Choose a capacitor with a voltage rating at least twice the maximum voltage that it will be exposed to. Choose this value because most ceramic capacitors lose significant capacitance when biased. This value also improves the long term reliability of the system.