SLUSDK4E
may 2020 – july 2023
UCC28782
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Detailed Pin Description
8.3.1
BUR Pin (Programmable Burst Mode)
8.3.2
FB Pin (Feedback Pin)
8.3.3
REF Pin (Internal 5-V Bias)
8.3.4
VDD Pin (Device Bias Supply)
8.3.5
P13 and SWS Pins
8.3.6
S13 Pin
8.3.7
IPC Pin (Intelligent Power Control Pin)
8.3.8
RUN Pin (Driver and Bias Source for Isolator)
8.3.9
PWMH and AGND Pins
8.3.10
PWML and PGND Pins
8.3.11
SET Pin
8.3.12
RTZ Pin (Sets Delay for Transition Time to Zero)
8.3.13
RDM Pin (Sets Synthesized Demagnetization Time for ZVS Tuning)
8.3.14
BIN, BSW, and BGND Pins
8.3.15
XCD Pin
8.3.16
CS, VS, and FLT Pins
8.4
Device Functional Modes
8.4.1
Adaptive ZVS Control with Auto-Tuning
8.4.2
Dead-Time Optimization
8.4.3
EMI Dither and Dither Fading Function
8.4.4
Control Law across Entire Load Range
8.4.5
Adaptive Amplitude Modulation (AAM)
8.4.6
Adaptive Burst Mode (ABM)
8.4.7
Low Power Mode (LPM)
8.4.8
First Standby Power Mode (SBP1)
8.4.9
Second Standby Power Mode (SBP2)
8.4.10
Startup Sequence
8.4.11
Survival Mode of VDD (INT_STOP)
8.4.12
Capacitor Voltage Balancing Function
8.4.13
Device Functional Modes for Bias Regulator Control
8.4.13.1
Mitigation of Switching Interaction with ACF Converter
8.4.13.2
Protection Functions for the Bias Regulator
8.4.13.3
BIN-Pin Related Protections
8.4.13.4
BSW-Pin Related Protections
8.4.14
System Fault Protections
8.4.14.1
Brown-In and Brown-Out
8.4.14.2
Output Over-Voltage Protection (OVP)
8.4.14.3
Input Over Voltage Protection (IOVP)
8.4.14.4
Over-Temperature Protection (OTP) on FLT Pin
8.4.14.5
Over-Temperature Protection (OTP) on CS Pin
8.4.14.6
Programmable Over-Power Protection (OPP)
8.4.14.7
Peak Power Limit (PPL)
8.4.14.8
Output Short-Circuit Protection (SCP)
8.4.14.9
Over-Current Protection (OCP)
8.4.14.10
External Shutdown
8.4.14.11
Internal Thermal Shutdown
8.4.15
Pin Open/Short Protections
8.4.15.1
Protections on CS pin Fault
8.4.15.2
Protections on P13 pin Fault
8.4.15.3
Protections on RDM and RTZ pin Faults
9
Application and Implementation
9.1
Application Information
9.2
Typical Application Circuit
9.2.1
Design Requirements for a 65-W USB-PD Adapter Application
9.2.2
Detailed Design Procedure
9.2.2.1
Input Bulk Capacitance and Minimum Bulk Voltage
9.2.2.2
Transformer Calculations
9.2.2.2.1
Primary-to-Secondary Turns Ratio (NPS)
9.2.2.2.2
Primary Magnetizing Inductance (LM)
9.2.2.2.3
Primary Winding Turns (NP)
9.2.2.2.4
Secondary Winding Turns (NS)
9.2.2.2.5
Auxiliary Winding Turns (NA)
9.2.2.2.6
Winding and Magnetic Core Materials
9.2.2.3
Clamp Capacitor Calculation
9.2.2.3.1
Primary-Resonance ACF
9.2.2.3.2
Secondary-Resonance ACF
9.2.2.4
Bleed-Resistor Calculation
9.2.2.5
Output Filter Calculation
9.2.2.6
Calculation of ZVS Sensing Network
9.2.2.7
Calculation of BUR Pin Resistances
9.2.2.8
Calculation of Compensation Network
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
General Considerations
11.1.2
RDM and RTZ Pins
11.1.3
SWS Pin
11.1.4
VS Pin
11.1.5
BUR Pin
11.1.6
FB Pin
11.1.7
CS Pin
11.1.8
BIN Pin
11.1.9
BSW Pin
11.1.10
AGND Pin
11.1.11
BGND Pin
11.1.12
PGND Pin
11.1.13
EP Thermal Pad
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTW|24
MPQF167C
Thermal pad, mechanical data (Package|Pins)
RTW|24
QFND062N
Orderable Information
slusdk4e_oa
8.2
Functional Block Diagram