SLUSER8C June   2022  – March 2023 UCC28C50 , UCC28C51 , UCC28C52 , UCC28C53 , UCC28C54 , UCC28C55 , UCC28C56H , UCC28C56L , UCC28C57H , UCC28C57L , UCC28C58 , UCC28C59 , UCC38C50 , UCC38C51 , UCC38C52 , UCC38C53 , UCC38C54 , UCC38C55

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Detailed Pin Description
        1. 8.3.1.1 COMP
        2. 8.3.1.2 FB
        3. 8.3.1.3 CS
        4. 8.3.1.4 RT/CT
        5. 8.3.1.5 GND
        6. 8.3.1.6 OUT
        7. 8.3.1.7 VDD
        8. 8.3.1.8 VREF
      2. 8.3.2  Undervoltage Lockout
      3. 8.3.3  ±1% Internal Reference Voltage
      4. 8.3.4  Current Sense and Overcurrent Limit
      5. 8.3.5  Reduced-Discharge Current Variation
      6. 8.3.6  Oscillator Synchronization
      7. 8.3.7  Soft-Start Timing
      8. 8.3.8  Enable and Disable
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Voltage Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 UVLO Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Input Bulk Capacitor and Minimum Bulk Voltage
        2. 9.2.2.2  Transformer Turns Ratio and Maximum Duty Cycle
        3. 9.2.2.3  Transformer Inductance and Peak Currents
        4. 9.2.2.4  Output Capacitor
        5. 9.2.2.5  Current Sensing Network
        6. 9.2.2.6  Gate Drive Resistor
        7. 9.2.2.7  VREF Capacitor
        8. 9.2.2.8  RT/CT
        9. 9.2.2.9  Start-Up Circuit
        10. 9.2.2.10 Voltage Feedback Compensation
          1. 9.2.2.10.1 Power Stage Poles and Zeroes
          2. 9.2.2.10.2 Slope Compensation
          3. 9.2.2.10.3 Open-Loop Gain
          4. 9.2.2.10.4 Compensation Loop
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Precautions
        2. 9.4.1.2 Feedback Traces
        3. 9.4.1.3 Bypass Capacitors
        4. 9.4.1.4 Compensation Components
        5. 9.4.1.5 Traces and Ground Planes
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The UCCx8C5x family of devices are high-performance current-mode PWM controllers that can drive both Si and SiC MOSFETs in various applications. The UCCx8C5x family is a more efficient and robust version of the UCCx8C4x.

The UCCx8C5x family has new UVLO thresholds that allow for reliable SiC MOSFET operation (UCC28C56-59), in addition to existing UVLO thresholds for continued Si MOSFET support (UCCx8C50-55).

VDD absolute maximum voltage rating is extended from 20 V to 30 V for optimally driving the gate of 20-Vgs, 18-Vgs, or 15-Vgs SiC MOSFETs, while also allowing for the exclusion of an external LDO.

Device Performance Improvements
PARAMETERUCCx8C4xUCCx8C5x
Supply current at 52 kHz2.3 mA1.3 mA
Startup current (max)100 µA75 µA
VDD abs max20 V30 V
Reference Voltage Accuracy±2%±1%
UVLO and DMAX for Si FET6 options6 options
UVLO and DMAX for SiC FETnone6 options
Smallest package optionVSSOP (8)VSSOP (8)

The UCCx8C5x family is offered in 8-pin VSSOP (DGK), and 8-pin SOIC (D) packages.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
UCC28C50, UCC28C51
UCC28C52, UCC28C53,
UCC28C54, UCC28C55,
UCC38C50, UCC38C51
UCC38C52, UCC38C53
UCC38C54, UCC38C55		SOIC (8)3.91 mm × 4.90 mm
VSSOP (8)3.00 mm × 3.00 mm
UCC28C56H, UCC28C56L
UCC28C57H, UCC28C57L,
UCC28C58, UCC28C59		SOIC (8)3.91 mm × 4.90 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-20221102-SS0I-708N-CNP5-HV7QXLTZPQC1-low.svgSimplified Application