SLUS492K June   2001  – November 2023 UCC27323 , UCC27324 , UCC27325 , UCC37323 , UCC37324 , UCC37325

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stage
      2. 7.3.2 Output Stage
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Source/Sink Capabilities During Miller Plateau
        2. 8.2.2.2 Parallel Outputs
        3. 8.2.2.3 VDD
        4. 8.2.2.4 Driver Current and Power Requirements
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

VDD = 4.5 to 15 V, TA = TJ (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
INPUT (INA, INB)
VIN_HLogic 1 input threshold1.62.22.5V
VIN_LLogic 0 input threshold0.81.21.5
Input current0 V ← VIN ← VDD–1010µA
OUTPUT (OUTA, OUTB)
Output currentVDD = 14 V(1)4A
ROH Output resistance highIOUT = –10 mA, (2)0.61.5 Ω
ROL Output resistance low IOUT = 10 mA, (2)0.41
OVERALL
IDDStatic Operating CurrentUCCx7323INA = 0 V, INB = 0 V300450µA
INA = 0 V, INB = HIGH300450
INA = HIGH, INB = 0 V300450
INA = HIGH, INB = HIGH300450
UCCx7324INA = 0 V, INB = 0 V250
INA = 0 V, INB = HIGH300450
INA = HIGH, INB = 0 V300450
INA = HIGH, INB = HIGH600750
UCCx7325INA = 0 V, INB = 0 V150300
INA = 0 V, INB = HIGH450600
INA = HIGH, INB = 0 V150300
INA = HIGH, INB = HIGH450600
(1) Parameter not tested in production
(2) Output pullup resistance is a DC measurement that measures resistance of PMOS structure only, not N-channel structure.