SLUSG03 December   2024 UCC57102Z-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Driver Stage
      3. 6.3.3 Desaturation (DESAT) Protection
      4. 6.3.4 Fault (FLT)
      5. 6.3.5 VREF
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VDD Undervoltage Lockout
      3. 7.2.3 Application Curves
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Desaturation (DESAT) Protection

The UCC57102Z-Q1 implements a fast overcurrent and short circuit protection feature to protect the MOSFET/IGBT from catastrophic breakdown during a fault. The DESAT pin has a typical 6.5 V threshold with respect to GND, the source or emitter of the power semiconductor. When the input is in a floating condition or the output is held in the LOW state, the DESAT pin is pulled down by an internal MOSFET and held in the LOW state, which prevents the overcurrent and short circuit fault from false triggering. The internal current source of the DESAT pin is activated only during the driver ON state, which means the overcurrent and short circuit protection feature only works when the power semiconductor is in the ON state. The internal pulldown MOSFET helps to discharge the voltage of the DESAT pin when the power semiconductor is turned off. The device features a 150-ns internal leading edge blanking time after OUT switches to the HIGH state. Also, the OUT stay low for 25us Tmute time after the DESAT is triggered. The FLT will resume high at the first IN raising edge once the Tmute time expired. The UCC57102Z-Q1 internal current source is activated to charge the external blanking capacitor after the internal leading edge blanking time. The typical value of the internal current source is 250 µA. More details about the DESAT circuit design can be found in Applications and Benefits of UCC5710x-Q1.

UCC57102Z-Q1 DESAT ProtectionFigure 6-3 DESAT Protection