To increase the reliability and feasibility of the design it is recommended to adhere to the following guidelines for PCB layout. These guidelines are general recommendations which can be followed for any power supply design and are generally topology-agnostic. The main theme in power supply layouts is to keep high current loops as small as possible to avoid coupling and any additional losses or false switching due to inaccurate sensing caused by board parasitics.

1. Minimize the high current loops to reduce parasitic capacitances and inductances. For UCG28826, these are the primary side power loop, secondary side power loop and the leakage snubber loop.
2. Separate the device signal ground from the high current ground in order to isolate the switching noise away from the low voltage signals. For UCG28826, the components on pins 4-11 are referenced to GND pins 3 and 10 which then connect to the device thermal pad and GND power plane and follows this recommendation.
3. The bypass capacitor on VCC pin must be placed as close as possible to the VCC and GND pins of the device.

The UCG28826 Evaluation Module User's Guide can be used as a reference when designing the circuit board.