SLUSFF2 October   2024 UCG28826

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Detailed Pin Descriptions
      1. 6.3.1  HV - High Voltage Input
      2. 6.3.2  SW - Switch Node
      3. 6.3.3  GND – Ground Return
      4. 6.3.4  FLT - External Overtemperature Fault
      5. 6.3.5  FB ­­– Feedback
      6. 6.3.6  TR - Turns Ratio
      7. 6.3.7  IPK - Peak Current and Dithering
      8. 6.3.8  FCL - Frequency clamp and fault response
      9. 6.3.9  CDX - CCM, drive strength and X-cap discharge
      10. 6.3.10 VCC - Input Bias
    4. 6.4 Feature Description
      1. 6.4.1  Self Bias and Auxless Sensing
      2. 6.4.2  Control Law
        1. 6.4.2.1 Valley Switching
        2. 6.4.2.2 Frequency Foldback
        3. 6.4.2.3 Burst Mode
        4. 6.4.2.4 Continuous Conduction Mode (CCM)
      3. 6.4.3  GaN HEMT Switching Capability
      4. 6.4.4  Soft Start
      5. 6.4.5  Frequency Clamp
      6. 6.4.6  Frequency Dithering
      7. 6.4.7  Slew Rate Control
      8. 6.4.8  Transient Peak Power Capability
      9. 6.4.9  X-Cap Discharge
      10. 6.4.10 Fault Protections
        1. 6.4.10.1 Brownout Protection
        2. 6.4.10.2 Short-Circuit Protection
        3. 6.4.10.3 Output Over Voltage Protection
        4. 6.4.10.4 Over Power Protection (OPP, LPS)
        5. 6.4.10.5 Overtemperature Protection
        6. 6.4.10.6 Open FB Protection
        7. 6.4.10.7 Error Codes for Protections
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Bulk Capacitor
        2. 7.2.2.2 Transformer Primary Inductance and Turns Ratio
        3. 7.2.2.3 Output Capacitor
        4. 7.2.2.4 Selection Resistors
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Option Addendum
    2. 10.2 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
  • REZ|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BIAS SUPPLY
VVCCSHORT Threshold for reduced VCC startup current 0.9 V
IHVLO Reduced HV startup current Before VCC reaches VVCCSHORT 1 mA
IHVHI Full HV startup current After VCC exceeds VVCCSHORT 4 mA
VVCCOFF VCC under voltage lock out threshold 5.1 V
VVCC_REG VCC regulation voltage and start-up threshold 5.8 V
VVCC_CHG VCC charging trigger threshold Trigger VCC charging to VVCC_REG 5.6 V
IVCC Operating supply current No switching 700 µA
IVCCSLEEP Supply current in burst mode No switching 250 µA
IVCCFAULT Supply current when a protection is triggered 250 µA
GAN POWER TRANSISTOR
RDSON Drain-source on-resistance TJ = 25 °C 170 mΩ
COSS Output capacitance VSW = 400V 40 pF
GAN GATE DRIVER
Turn-on dV/dt For SW node, VDS = 325V, Option 1 7 V/ns
Turn-on dV/dt  For SW node, VDS = 325V, Option 2 5 V/ns
Turn-on dV/dt  For SW node, VDS = 325V, Option 3 3 V/ns
PEAK CURRENT CONTROL
IPKMAX Maximum peak current Option 1 2.8 A
Option 2 3.1
Option 3 3.5
IPKMAX/IPKMIN Max. to min. peak current ratio Option 1 4
Option 2 3
TSS Soft start time 4 ms
FEEDBACK CONTROL
RFB FB pull-up resistor 60 kΩ
VFBOPEN Open FB Pin voltage See Table 6-5
Mode transition thresholds
VBST_OFF Burst-off threshold Turn-off switching 250 mV
VBST_ON Burst-on threshold Resume burst switching 300 mV
VBST_EX Burst mode exit threshold Exit to frequency foldback 500 mV
fMIN,CLAMP Minimum frequency clamp During normal operation 25 kHz
During soft start 10
TSWMAX Maximum time period 40 µs
TONMAX Maximum on time 17 µs
fMAX,CLAMP Frequency clamp Option 1 140 kHz
Option 2 200
Option 3 250
Option 4 500
TDDCM DCM ring fixed timer From last seen DCM ring valley 3.75 µs
EMI DITHERING
fcarrier Carrier frequency 390 Hz
IDither,max Carrier amplitude % of instantaneous peak currents, Option 1 ±6.25 %
% of instantaneous peak currents, Option 2 ±12.5
PROTECTIONS
VTH_BI Brown-in threshold 112 V
VTH_BO Brownout threshold 98 V
TDBO Brown-out delay time 60 ms
IFLT FLT pin source current 75 µA
VTH_OTP FLT threshold voltage Triggers external overtemperature fault 0.6 V
IFLT on time 260 µs
IFLT time period 10 ms
Number of external TSD cycles Before fault is triggered 3
RSW SW pin impedance 9.5 MΩ
VOVP OVP detection threshold VOUT threshold 25 V
Internal overtemperature protection shut down threshold Temperature increasing 150 °C
Internal overtemperature protection hysteresis Temperature reducing 10 °C
TRETRY Auto-retry time 1 s
POPPH Over power protection threshold Triggers after 80ms 140 W
POPPL Over power protection threshold Triggers after 4.2s 90 W
ILPS LPS fault output current threshold Input referred, triggers after 4.2s 7 A
ISCP Short Circuit Protection Primary current threshold 4.5 A
Short Circuit Protection No of cycles 3
tSCP Short-circuit response time 140 ns
X CAP DISCHARGE
IACDET Line removal detection current Current sink from HV pin 2 mA
IXDIS X-cap discharge Current  5 mA
TXDIS X-cap discharge Time  CXCAP = 1µF 1 s