SBOS344D September   2005  – November 2023 XTR117

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-A1BA2296-600A-4764-BBF1-62E55FF362E3/GUID-7F491310-4E37-4E2F-922E-35EFD7CCE84F
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Reverse-Voltage Protection
      2. 6.3.2 Overvoltage Surge Protection
      3. 6.3.3 VSON Package
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 External Transistor
      2. 7.1.2 Minimum Output Current
      3. 7.1.3 Offsetting the Input
      4. 7.1.4 Radio Frequency Interference
      5. 7.1.5 Maximum Output Current
      6. 7.1.6 Circuit Stability
    2. 7.2 Typical Application
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
  9. Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGK|8
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-20220330-SS0I-HN08-PZRP-DGKNRQLMS5ZS-low.svgFigure 4-1 DGK Package, 8-Pin VSSOP (Top View)
GUID-20220330-SS0I-KDKS-D97J-NBCRVFKKV8SL-low.svgFigure 4-2 DRB Package, 8-Pin VSON (Top View)
(1) NC = No connection.
(2) Connect thermal die pad to IRET or leave unconnected on PCB.
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
IIN 2 I Current input pin
IRET 3 I Local ground return pin for VREG
IO 4 O Regulated 4-mA to 20-mA current-loop output
E (Emitter) 5 I Emitter connection for external transistor
B (Base) 6 O Base connection for external transistor
V+ 7 P Loop power supply
VREG 8 O 5-V regulator voltage output
NC 1 Not connected.
Thermal Pad Pad Thermal Pad. Connect to IRET or leave floating.
I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.