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CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizers With 1.8V, 2.5V, and 3.3V Outputs
SCAS918E
June 2013 – August 2024
CDCE913-Q1
,
CDCEL913-Q1
PRODUCTION DATA
CONTENTS
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CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizers With 1.8V, 2.5V, and 3.3V Outputs
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Control Terminal Configuration
8.3.2
Default Device Configuration
8.3.3
I2C Serial Interface
8.3.4
Data Protocol
8.4
Device Functional Modes
8.4.1
SDA and SCL Hardware Interface
8.5
Programming
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Spread-Spectrum Clock (SSC)
9.2.2.2
PLL Frequency Planning
9.2.2.3
Crystal Oscillator Start-Up
9.2.2.4
Frequency Adjustment With Crystal Oscillator Pulling
9.2.2.5
Unused Inputs and Outputs
9.2.2.6
Switching Between XO and VCXO Mode
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Register Maps
10.1
I2C Configuration Registers
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
PW|14
MPDS360A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scas918e_oa
scas918e_pm
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Data Sheet
CDCE913-Q1 and CDCEL913-Q1
Programmable 1-PLL VCXO Clock Synthesizer
s
With 1.8V, 2.5V, and 3.3V Outputs
1
Features
Qualified for automotive applications
AEC-Q100 qualified with the following results:
Device temperature grades
Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
Device HBM ESD classification level H2
Device CDM ESD classification level C6
Functional Safety-Capable
Documentation available to aid functional safety system design
In-system programmability and EEPROM
Serial programmable volatile register
Nonvolatile EEPROM to store customer settings
Flexible input clocking concept
External crystal: 8MHz to 32MHz
On-chip VCXO: pull range ±150ppm
Single-ended LVCMOS up to 160MHz
Free selectable output frequency up to 230MHz
Low-noise PLL core
PLL loop filter components integrated
Low period jitter (typical 50ps)
Separate output supply pins:
CDCE913-Q1: 3.3V and 2.5V
CDCEL913-Q1: 1.8V
Flexible clock driver
Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID,
Bluetooth®
, WLAN, Ethernet, and GPS
Generates common clock frequencies used with TI-
DaVinci™
,
OMAP™
, DSPs
Programmable SSC modulation
Enables 0-PPM clock generation
1.8V device power supply
Packaged in TSSOP
Development and programming kit for easy PLL design and programming (TI
Pro-Clock™
)
2
Applications
Clusters
Head units
Navigation systems
Advanced driver assistance systems (ADAS)
