CSD25304W1015 20-V P-Channel NexFET Power MOSFET
- SLPS510A July 2014 – August 2014 CSD25304W1015
  
  PRODUCTION DATA.

Full reading width

DATA SHEET

CSD25304W1015 20-V P-Channel NexFET Power MOSFET

1 Features

Ultra-Low Q_g and Q_gd
Small Footprint
Low Profile 0.62 mm Height
Pb Free
RoHS Compliant
Halogen Free
CSP 1 × 1.5 mm Wafer Level Package

2 Applications

Battery Management
Load Switch
Battery Protection

3 Description

This 27 mΩ, –20 V, P-Channel device is designed to deliver the lowest on-resistance and gate charge in a small 1.0 × 1.5 mm outline with excellent thermal characteristics in an ultra-low profile.

Top View

Product Summary

T_A = 25°C		TYPICAL VALUE		UNIT
V_DS	Drain-to-Source Voltage	–20		V
Q_g	Gate Charge Total (4.5 V)	3.3		nC
Q_gd	Gate Charge Gate-to-Drain	0.5		nC
R_DS(on)	Drain-to-Source On-Resistance	V_GS= –1.8 V	65	mΩ
		V_GS = –2.5 V	36	mΩ
		V_GS = –4.5 V	27	mΩ
V_GS(th)	Voltage Threshold	–0.8		V

Ordering Information⁽¹⁾

Device	Qty	Media	Package	Ship
CSD25304W1015	3000	7-Inch Reel	1.0 mm × 1.5 mm Wafer Level Package	Tape and Reel
CSD25304W1015T	250	7-Inch Reel	1.0 mm × 1.5 mm Wafer Level Package	Tape and Reel

For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

T_A = 25°C		VALUE	UNIT
V_DS	Drain-to-Source Voltage	–20	V
V_GS	Gate-to-Source Voltage	±8	V
I_D	Continuous Drain Current⁽¹⁾	–3.0	A
I_DM	Pulsed Drain Current⁽²⁾	–41	A
P_D	Power Dissipation	0.75	W
T_J, T_stg	Operating Junction and Storage Temperature Range	–55 to 150	°C

Device operating at a temperature of 105ºC
Typ R_θJA = 165°C/W, Pulse width ≤100 μs, duty cycle ≤1%

R_DS(on) vs V_GS

Gate Charge

4 Revision History

Changes from * Revision (July 2014) to A Revision

Reduced power dissipation rating to 0.75 W (min Cu calculation) Go
Corrected Min Thermal Information from 85 to 165 Go
Corrected Max Thermal Information from 165 to 85 Go
Updated the mechanical drawing to add more precision Go

5 Specifications

5.1 Electrical Characteristics

(T_A = 25°C unless otherwise stated)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-Source Voltage	V_GS = 0 V, I_D = –250 μA	–20			V
I_DSS	Drain-to-Source Leakage Current	V_GS = 0 V, V_DS = –16 V			–1	μA
I_GSS	Gate-to-Source Leakage Current	V_DS = 0 V, V_GS = ±8 V			–100	nA
V_GS(th)	Gate-to-Source Threshold Voltage	V_DS = V_GS, I_D = –250 μA	–0.55	–0.8	–1.15	V
R_DS(on)	Drain-to-Source On-Resistance	V_GS = –1.8 V, I_D = –1.5 A		65	92	mΩ
		V_GS = –2.5 V, I_D = –1.5 A		36	45.5	mΩ
		V_GS = –4.5 V, I_D = –1.5 A		27	32.5	mΩ
g_ƒs	Transconductance	V_DS = –10 V, I_D = –1.5 A		12		S
DYNAMIC CHARACTERISTICS
C_ISS	Input Capacitance	V_GS = 0 V, V_DS = –10 V, ƒ = 1 MHz		458	595	pF
C_OSS	Output Capacitance			231	300	pF
C_RSS	Reverse Transfer Capacitance			12	15.6	pF
Q_g	Gate Charge Total (–4.5 V)	V_DS = –10 V, I_D = –1.5 A		3.3	4.4	nC
Q_gd	Gate Charge Gate-to-Drain			0.5		nC
Q_gs	Gate Charge Gate-to-Source			0.7		nC
Q_g(th)	Gate Charge at V_th			0.4		nC
Q_OSS	Output Charge	V_DS = –10 V, V_GS = 0 V		3.7		nC
t_d(on)	Turn On Delay Time	V_DS = –10 V, V_GS = –4.5 V, I_D = –1.5 A R_G = 20 Ω		6		ns
t_r	Rise Time			4		ns
t_d(off)	Turn Off Delay Time			24		ns
t_ƒ	Fall Time			10		ns
DIODE CHARACTERISTICS
V_SD	Diode Forward Voltage	I_S = –1.5 A, V_GS = 0 V		–0.75	–1	V
Q_rr	Reverse Recovery Charge	V_DS= –10 V, I_F = –1.5 A, di/dt = 200 A/μs		7.2		nC
t_rr	Reverse Recovery Time	V_DS= –10 V, I_F = –1.5 A, di/dt = 200 A/μs		11.6		ns

5.2 Thermal Information

(T_A = 25°C unless otherwise stated)

THERMAL METRIC		MIN	TYP	MAX	UNIT
R_θJA	Junction-to-Ambient Thermal Resistance⁽¹⁾		165		°C/W
R_θJA	Junction-to-Ambient Thermal Resistance⁽²⁾		85		°C/W

(1) Device mounted on FR4 material with minimum Cu mounting area.

(2) Device mounted on FR4 material with 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu.

Typ R_θJA = 85°C/W when mounted on
1 inch² of 2 oz. Cu.

Typ R_θJA = 165°C/W when mounted on minimum pad area of
2 oz. Cu.

5.3 Typical MOSFET Characteristics

(T_A = 25°C unless otherwise stated)

Figure 1. Transient Thermal Impedance

Figure 2. Saturation Characteristics

I_D = –1.5 A		V_DS = –10 V

Figure 4. Gate Charge

	I_D = –250 µA

Figure 6. Threshold Voltage vs Temperature

	I_D = –1.5 A

Figure 8. Normalized On-State Resistance vs Temperature

Single Pulse, Max R_θJA = 165°C/W

Figure 10. Maximum Safe Operating Area

	V_DS = –5 V

Figure 3. Transfer Characteristics

Figure 5. Capacitance

Figure 7. On-State Resistance vs Gate-to-Source Voltage

Figure 9. Typical Diode Forward Voltage

Figure 11. Maximum Drain Current vs Temperature

6 Device and Documentation Support

6.1 Trademarks

All trademarks are the property of their respective owners.

6.2 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

6.3 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.