Typical values at 25°C, AIN
= -1 dBFS, FIN = 347 MHz, FS = 800 MSPS, High power mode, FG
calibration, JMODE 0, CPLL off, CPLLREF = 50 MHz and VA11Q and VCLK11
noise suppression on when CPLL on, nominal supply voltages, unless otherwise noted.
SNR results exclude DC, HD2 to HD9; SINAD, ENOB, and SFDR results exclude DC.
Figure 7-1 DNL
vs Code
Figure 7-3 Input
Fullscale vs Input Frequency
Figure 7-5 Single Tone FFT at 997 MHz and -1dBFS
Figure 7-7 Single Tone FFT at 1797 MHz and -1dBFS
Figure 7-9 Single Tone FFT at 3497 MHz and -1dBFS
Low
Power Mode
Figure 7-11 Single Tone FFT at 347MHz and -1dBFS
Low
Power Mode
Figure 7-13 Single Tone FFT at 1797MHz and -1dBFS
Figure 7-15 SNR
vs Input Frequency
Figure 7-17 ENOB
vs Input Frequency
Figure 7-19 HD3
vs Input Frequency
Figure 7-21 SNR
vs Sample Rate
Figure 7-23 ENOB
vs Sample Rate
Low
Power Mode
Figure 7-25 SNR
vs Sample Rate
Low
Power Mode
Figure 7-27 ENOB
vs Sample Rate
Figure 7-29 SNR
vs Input Amplitude
Low
Power Mode
Figure 7-31 SNR
vs Input Amplitude
Figure 7-33 SFDR
vs Clock Amplitude
FIN = 997MHz
Figure 7-35 SFDR
vs Temperature
FIN = 997MHz
Figure 7-37 HD2
vs Temperature
FIN = 997MHz
Figure 7-39 Worst
non-HD2/3 Spur vs Temperature
Low
Power Mode, FIN = 347MHz
Figure 7-41 SFDR
vs Temperature
Low
Power Mode, FIN = 347MHz
Figure 7-43 HD2
vs Temperature
Low
Power Mode, FIN = 347MHz
Figure 7-45 Worst
non-HD2/3 Spur vs Temperature
FIN = 347MHz
Figure 7-47 HD2,
HD3 and Worst non-HD2/3 Spur vs Supply Voltage
Low
Power Mode, FIN = 347MHz
Figure 7-49 HD2,
HD3 and Worst non-HD2/3 Spur vs Supply Voltage
-7
dBFS each tone
Figure 7-51 Dual Tone FFT at 348
MHz
-7
dBFS each tone
Figure 7-53 Dual Tone FFT at 1798
MHz
-7
dBFS each tone
Figure 7-55 Dual Tone FFT at 2698
MHz
Low
Power Mode, -7 dBFS each tone
Figure 7-57 Dual Tone FFT at 348 MHz
(LP Mode)
10
MHz Tone Spacing
Figure 7-59 IMD3
vs Input Frequency
Channel A victim
Figure 7-61 Crosstalk vs Input Frequency
CPLL
On
Figure 7-63 SNR
vs Reference Clock Frequency
Figure 7-65 SFDR
vs Input Frequency and CPLL and Power Mode
Figure 7-67 SINAD
vs Input Frequency and CPLL and Power Mode
Figure 7-69 HD2
vs Input Frequency and CPLL and Power Mode
Figure 7-71 Quad
Channel, Power Dissipation vs FS for JMODES 0 - 3
Figure 7-73 Quad
Channel, Power Dissipation vs FS for JMODES 8 - 11
Independent of JMODE
Figure 7-75 Quad
Channel, IVA19 vs FS
Independent of Power Mode
Figure 7-77 Quad
Channel, IVD11 vs FS for JMODES 0 - 3
Independent of Power Mode
Figure 7-79 Quad
Channel, IVD11 vs FS for JMODES 8 - 11
Figure 7-81 Dual
Channel, Power Dissipation vs FS for JMODES 0 - 3
Figure 7-83 Dual
Channel, Power Dissipation vs FS for JMODES 8 - 11
Independent of JMODE
Figure 7-85 Dual
Channel, IVA19 vs FS
Independent of Power Mode
Figure 7-87 Dual
Channel, IVD11 vs FS for JMODES 0 - 3
Independent of Power Mode
Figure 7-89 Dual
Channel, IVD11 vs FS for JMODES 8 - 11
Figure 7-91 Single Channel, Power Dissipation vs FS for JMODES 0 - 3
Figure 7-93 Single Channel, Power Dissipation vs FS for JMODES 8 -
11
Independent of JMODE
Figure 7-95 Single Channel, IVA19 vs FS
Independent of Power Mode
Figure 7-97 Single Channel, IVD11 vs FS for JMODES 0 - 3
Independent of Power Mode
Figure 7-99 Single Channel, IVD11 vs FS for JMODES 8 - 11
Independent of Power Mode
Figure 7-101 Quad
Channel, Power Dissipation Change with Calibration Mode
Independent of Power Mode
Figure 7-103 Single Channel, Power Dissipation Change with Calibration Mode
Independent of Power Mode
Figure 7-105 Dual
Channel, IVA19 Change with Calibration Mode
Independent of Power Mode
Figure 7-107 Quad
Channel, IVA11 Change with Calibration Mode
Independent of Power Mode
Figure 7-109 Single Channel, IVA11 Change with Calibration Mode
Independent of Power Mode
Figure 7-111 Dual
Channel, IVD11 Change with Calibration Mode
Independent of Power Mode
Figure 7-113 Quad
Channel, Power Dissipation vs Temperature
Independent of Power Mode
Figure 7-115 Single Channel, Power Dissipation vs Temperature