JAJSSY9
February 2024
ADC12DL1500
,
ADC12DL2500
,
ADC12DL500
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics: DC Specifications
5.6
Electrical Characteristics: Power Consumption
5.7
Electrical Characteristics: AC Specifications (Dual-Channel Mode)
5.8
Electrical Characteristics: AC Specifications (Single-Channel Mode)
5.9
Timing Requirements
5.10
Switching Characteristics
5.11
Timing Diagrams
5.12
Typical Characteristics - ADC12DL500
5.13
Typical Characteristics - ADC12DL1500 (1GSPS)
5.14
Typical Characteristics - ADC12DL1500 (1.5GSPS)
5.15
Typical Characteristics - ADC12DL2500 (2GSPS)
5.16
Typical Characteristics - ADC12DL2500 (2.5GSPS)
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Analog Inputs
6.3.1.1
Analog Input Protection
6.3.1.2
Full-Scale Voltage (VFS) Adjustment
6.3.1.3
Analog Input Offset Adjust
6.3.2
ADC Core
6.3.2.1
ADC Theory of Operation
6.3.2.2
ADC Core Calibration
6.3.2.3
ADC Overrange Detection
6.3.2.4
Code Error Rate (CER)
6.3.2.5
Internal Dither
6.3.3
Timestamp
6.3.4
Clocking
6.3.4.1
Noiseless Aperture Delay Adjustment (tAD Adjust)
6.3.4.2
Aperture Delay Ramp Control (TAD_RAMP)
6.3.4.3
SYSREF Capture for Multi-Device Synchronization and Deterministic Latency
6.3.4.3.1
SYSREF Position Detector and Sampling Position Selection (SYSREF Windowing)
6.3.4.3.2
Automatic SYSREF Calibration
6.3.5
LVDS Digital Interface
6.3.5.1
Multi-Device Synchronization and Deterministic Latency Using Strobes
6.3.5.1.1
Dedicated Strobe Pins
6.3.5.1.2
Reduced Width Interface With Dedicated Strobe Pins
6.3.5.1.3
LSB Replacement With a Strobe
6.3.5.1.4
Strobe Over All Data Pairs
6.3.6
Alarm Monitoring
6.3.6.1
Clock Upset Detection
6.3.7
Temperature Monitoring Diode
6.3.8
Analog Reference Voltage
6.4
Device Functional Modes
6.4.1
Dual-Channel Mode (Non-DES Mode)
6.4.2
Internal Dither Modes
6.4.3
Single-Channel Mode (DES Mode)
6.4.4
LVDS Output Driver Modes
6.4.5
LVDS Output Modes
6.4.5.1
Staggered Output Mode
6.4.5.2
Aligned Output Mode
6.4.5.3
Reducing the Number of Strobes
6.4.5.4
Reducing the Number of Data Clocks
6.4.5.5
Scrambling
6.4.5.6
Digital Interface Test Patterns and LVSD SYNC Functionality
6.4.5.6.1
Active Pattern
6.4.5.6.2
Synchronization Pattern
6.4.5.6.3
User-Defined Test Pattern
6.4.6
Power-Down Modes
6.4.7
Calibration Modes and Trimming
6.4.7.1
Foreground Calibration Mode
6.4.8
Offset Calibration
6.4.9
Trimming
6.5
Programming
6.5.1
Using the Serial Interface
6.5.1.1
SCS
6.5.1.2
SCLK
6.5.1.3
SDI
6.5.1.4
SDO
6.5.1.5
80
6.5.1.6
Streaming Mode
6.5.1.7
82
7
Application and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
Reconfigurable Dual-Channel 2.5GSPS or Single-Channel 5GSPS Oscilloscope
7.2.1.1
Design Requirements
7.2.1.1.1
Input Signal Path
7.2.1.1.2
Clocking
7.2.1.1.3
ADC12DLx500
7.2.1.2
Application Curves
7.3
Initialization Set Up
7.4
Power Supply Recommendations
7.4.1
Power Sequencing
7.5
Layout
7.5.1
Layout Guidelines
7.5.2
Layout Example
8
Register Maps
8.1
SPI_REGISTER_MAP Registers
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ACF|256
MPBGAO1C
サーマルパッド・メカニカル・データ
発注情報
jajssy9_oa
jajssy9_pm
8
Register Maps