SBASAU8 December   2024 ADC3649

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Power Consumption
    6. 6.6  Electrical Characteristics - DC Specifications
    7. 6.7  Electrical Characteristics - AC Specifications (ADC3648 - 250 MSPS)
    8. 6.8  Electrical Characteristics - AC Specifications (ADC3649 - 500 MSPS)
    9. 6.9  Timing Requirements
    10. 6.10 Typical Characteristics, ADC3648
    11. 6.11 Typical Characteristics, ADC3649
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Inputs
        1. 8.3.1.1 Nyquist Zone Selection
        2. 8.3.1.2 Analog Front End Design
      2. 8.3.2 Sampling Clock
      3. 8.3.3 Multi-Chip Synchronization
        1. 8.3.3.1 SYSREF Monitor
      4. 8.3.4 Time-Stamp
      5. 8.3.5 Overrange
      6. 8.3.6 External Voltage Reference
      7. 8.3.7 Digital Gain
      8. 8.3.8 Decimation Filter
        1. 8.3.8.1 Uncommon Decimation Ratios
        2. 8.3.8.2 Decimation Filter Response
        3. 8.3.8.3 Decimation Filter Configuration
        4. 8.3.8.4 Numerically Controlled Oscillator (NCO)
      9. 8.3.9 Digital Interface
        1. 8.3.9.1 Parallel LVDS
        2. 8.3.9.2 Serial LVDS (SLVDS) with Decimation
          1. 8.3.9.2.1 SLVDS - Status Bit Insertion
        3. 8.3.9.3 Output Data Format
        4. 8.3.9.4 32-bit Output Resolution
        5. 8.3.9.5 Output Scrambler
        6. 8.3.9.6 Output MUX
        7. 8.3.9.7 Test Pattern
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low Latency Mode
      2. 8.4.2 Digital Channel Averaging
      3. 8.4.3 Power Down Mode
    5. 8.5 Programming
      1. 8.5.1 GPIO Programming
      2. 8.5.2 Register Write
      3. 8.5.3 Register Read
      4. 8.5.4 Device Programming
      5. 8.5.5 Register Map
      6. 8.5.6 Detailed Register Description
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Wideband Spectrum Analyzer
      2. 9.2.2 Design Requirements
        1. 9.2.2.1 Input Signal Path
        2. 9.2.2.2 Clocking
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Sampling Clock
      4. 9.2.4 Application Performance Plots
    3. 9.3 Initialization Set Up
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Decimation Filter Response

This section provides the different decimation filter responses with a normalized ADC sampling rate. The complex filter pass band is approximately 80% (−1dB) with a minimum of 85dB stop band rejection.

The decimation filter responses are normalized to the ADC sampling clock frequency FS and illustrated in Figure 8-23 to Figure 8-49. The interpretation is as follows: Each figure contains the filter pass-band, transition bands and alias or stop-bands as shown in Figure 8-22. The x-axis shows the offset frequency (after the NCO frequency shift) normalized to the ADC sampling rate FS.

For example, in the divide-by-4 complex setup, the output data rate is FS / 4 complex with a Nyquist zone of FS / 8 or 0.125 × FS. The transition band (colored in blue) is centered around 0.125 × FS and the alias transition band is centered at 0.375 × FS. The stop-bands (colored in red), which alias on top of the pass-band, are centered at 0.25 × FS and 0.5 × FS. The stop-band attenuation is greater than 85dB.

Note: For higher decimation ratios (/32 onward), the far out transition and stop-bands exceeds −120dB so the decimation filter plots show only the relevant closer in response with attenuation less than −120dB.
ADC3649 Interpretation of the Decimation Filter PlotsFigure 8-22 Interpretation of the Decimation Filter Plots
ADC3649 Complex Decimation by 2 Filter ResponseFigure 8-23 Complex Decimation by 2 Filter Response
ADC3649 Complex Decimation by 4 Filter ResponseFigure 8-25 Complex Decimation by 4 Filter Response
ADC3649 Complex Decimation by 8 Filter ResponseFigure 8-27 Complex Decimation by 8 Filter Response
ADC3649 Complex Decimation by 16 Filter ResponseFigure 8-29 Complex Decimation by 16 Filter Response
ADC3649 Complex Decimation by 32 Filter ResponseFigure 8-31 Complex Decimation by 32 Filter Response
ADC3649 Complex Decimation by 64 Filter ResponseFigure 8-33 Complex Decimation by 64 Filter Response
ADC3649 Complex Decimation by 128 Filter ResponseFigure 8-35 Complex Decimation by 128 Filter Response
ADC3649 Complex Decimation by 256 Filter ResponseFigure 8-37 Complex Decimation by 256 Filter Response
ADC3649 Complex Decimation by 512 Filter ResponseFigure 8-39 Complex Decimation by 512 Filter Response
ADC3649 Complex Decimation by 1024 Filter ResponseFigure 8-41 Complex Decimation by 1024 Filter Response
ADC3649 Complex Decimation by 2048 Filter ResponseFigure 8-43 Complex Decimation by 2048 Filter Response
ADC3649 Complex Decimation by 4096 Filter ResponseFigure 8-45 Complex Decimation by 4096 Filter Response
ADC3649 Complex Decimation by 8192 Filter ResponseFigure 8-47 Complex Decimation by 8192 Filter Response
ADC3649 Complex Decimation by 16384 Filter ResponseFigure 8-49 Complex Decimation by 16384 Filter Response
ADC3649 Complex Decimation by 32768 Filter ResponseFigure 8-51 Complex Decimation by 32768 Filter Response
ADC3649 Decimation by 2 Passband Ripple ResponseFigure 8-24 Decimation by 2 Passband Ripple Response
ADC3649 Decimation by 4 Passband Ripple ResponseFigure 8-26 Decimation by 4 Passband Ripple Response
ADC3649 Decimation by 8 Passband Ripple ResponseFigure 8-28 Decimation by 8 Passband Ripple Response
ADC3649 Decimation by 16 Passband Ripple ResponseFigure 8-30 Decimation by 16 Passband Ripple Response
ADC3649 Decimation by 32 Passband Ripple ResponseFigure 8-32 Decimation by 32 Passband Ripple Response
ADC3649 Complex Decimation by 64 Filter Ripple
                                                ResponseFigure 8-34 Complex Decimation by 64 Filter Ripple Response
ADC3649 Decimation by 128 Passband Ripple ResponseFigure 8-36 Decimation by 128 Passband Ripple Response
ADC3649 Decimation by 256 Passband Ripple ResponseFigure 8-38 Decimation by 256 Passband Ripple Response
ADC3649 Decimation by 512 Passband Ripple ResponseFigure 8-40 Decimation by 512 Passband Ripple Response
ADC3649 Decimation by 1024 Passband Ripple ResponseFigure 8-42 Decimation by 1024 Passband Ripple Response
ADC3649 Decimation by 2048 Passband Ripple ResponseFigure 8-44 Decimation by 2048 Passband Ripple Response
ADC3649 Decimation by 4096 Passband Ripple ResponseFigure 8-46 Decimation by 4096 Passband Ripple Response
ADC3649 Decimation by 8192 Passband Ripple ResponseFigure 8-48 Decimation by 8192 Passband Ripple Response
ADC3649 Decimation by 16384 Passband Ripple ResponseFigure 8-50 Decimation by 16384 Passband Ripple Response
ADC3649 Decimation by 32768 Passband Ripple
                                                ResponseFigure 8-52 Decimation by 32768 Passband Ripple Response