JAJSQJ8 January   2024 ADS1014L , ADS1015L

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Timing Diagram
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Multiplexer
      2. 7.3.2 Analog Inputs
      3. 7.3.3 Full-Scale Range (FSR) and LSB Size
      4. 7.3.4 Voltage Reference
      5. 7.3.5 Oscillator
      6. 7.3.6 Output Data Rate and Conversion Time
      7. 7.3.7 Digital Comparator
      8. 7.3.8 Conversion-Ready Pin
      9. 7.3.9 SMBus Alert Response
    4. 7.4 Device Functional Modes
      1. 7.4.1 Reset and Power-Up
      2. 7.4.2 Operating Modes
        1. 7.4.2.1 Single-Shot Mode
        2. 7.4.2.2 Continuous-Conversion Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
        1. 7.5.1.1 I2C Address Selection
        2. 7.5.1.2 I2C Interface Speed
          1. 7.5.1.2.1 Serial Clock (SCL) and Serial Data (SDA)
        3. 7.5.1.3 I2C Data Transfer Protocol
        4. 7.5.1.4 Timeout
        5. 7.5.1.5 I2C General-Call (Software Reset)
      2. 7.5.2 Reading and Writing Register Data
        1. 7.5.2.1 Reading Conversion Data or the Configuration Register
        2. 7.5.2.2 Writing the Configuration Register
      3. 7.5.3 Data Format
  9. 8 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 Unused Inputs and Outputs
      3. 9.1.3 Single-Ended Inputs
      4. 9.1.4 Input Protection
      5. 9.1.5 Analog Input Filtering
      6. 9.1.6 Connecting Multiple Devices
      7. 9.1.7 Duty Cycling For Low Power
      8. 9.1.8 I2C Communication Sequence Example
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-Supply Sequencing
      2. 9.3.2 Power-Supply Decoupling
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The ADS101xL are very small, low-power, noise-free, 12-bit, delta-sigma (ΔΣ) analog-to-digital converters (ADCs). The ADS101xL consist of a ΔΣ ADC core with an internal voltage reference, a clock oscillator, and an I2C interface. The ADS101xL also integrate a programmable gain amplifier (PGA) and a programmable digital comparator. Figure 7-1 and Figure 7-2 show the functional block diagrams of the ADS1014L and ADS1015L, respectively.

The ADS101xL ADC core measures a differential signal, VIN, that is the difference of V(AINP) and V(AINN). The converter core consists of a differential, switched-capacitor ΔΣ modulator followed by a digital filter. This architecture results in a very strong attenuation of any common-mode signals. Input signals are compared to the internal voltage reference. The digital filter receives a high-speed bitstream from the modulator and outputs a code proportional to the input voltage.

The ADS101xL have two available conversion modes: single-shot and continuous-conversion. In single-shot mode, the ADC performs one conversion of the input signal upon request, stores the conversion value to an internal Conversion register, and then enters a power-down state. This mode is intended to provide significant power savings in systems that only require periodic conversions or when there are long idle periods between conversions. In continuous-conversion mode, the ADC automatically begins a conversion of the input signal as soon as the previous conversion is completed. The rate of continuous conversion is equal to the programmed data rate. Data can be read at any time and always reflect the most recently completed conversion.