JAJSQJ8 January 2024 ADS1014L , ADS1015L
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ANALOG INPUTS | |||||||
Common-mode input impedance | FSR = ±6.144 V(1) | 10 | MΩ | ||||
FSR = ±4.096 V(1), FSR = ±2.048 V | 6 | ||||||
FSR = ±1.024 V | 3 | ||||||
FSR = ±0.512 V, FSR = ±0.256 V | 100 | ||||||
Differential input impedance | FSR = ±6.144 V(1) | 22 | MΩ | ||||
FSR = ±4.096 V(1) | 15 | ||||||
FSR = ±2.048 V | 4.9 | ||||||
FSR = ±1.024 V | 2.4 | ||||||
FSR = ±0.512 V, FSR = ±0.256 V | 710 | kΩ | |||||
SYSTEM PERFORMANCE | |||||||
Resolution (no missing codes) | 12 | Bits | |||||
DR | Data rate | 128, 250, 490, 920, 1600, 2400, 3300 | SPS | ||||
Data rate variation | All data rates | –10% | 10% | ||||
INL | Integral nonlinearity (best fit) | DR = 128 SPS, FSR = ±2.048 V | 0.5 | LSB | |||
Offset error (input referred) | FSR = ±2.048 V, differential inputs | –0.5 | 0 | 0.5 | LSB | ||
FSR = ±2.048 V, single-ended inputs | ±0.25 | LSB | |||||
Offset drift | FSR = ±2.048 V | 0.005 | LSB/°C | ||||
Offset error match | Between any two inputs | 0.25 | LSB | ||||
Gain error | TA = 25°C, FSR = ±2.048 V | ±0.05% | 0.25% | ||||
Gain drift(2) | FSR = ±0.256 V | 7 | ppm/°C | ||||
FSR = ±2.048 V | 5 | 40 | |||||
FSR = ±6.144 V | 5 | ||||||
Gain error match | Between any two gain settings | –0.1% | ±0.02% | 0.1% | |||
Between any two inputs | –0.1% | ±0.05% | 0.1% | ||||
DIGITAL INPUTS/OUTPUTS | |||||||
VIL | Logic input level, low | GND | 0.25 | V | |||
VIH | Logic input level, high | 1 | 3.6 | V | |||
VOL | Logic output level, low | IOL = 3 mA | GND | 0.3 | V | ||
IOL | Low-level output current | VOL = 0.6 V | 6 | mA | |||
Input current | GND ≤ VDigital Input ≤ VDD | –10 | 10 | µA | |||
Ci | Capacitance | Each pin | 10 | pF | |||
SUPPLY CURRENT AND POWER DISSIPATION | |||||||
IVDD | Supply current | Power-down | 1.2 | 5 | µA | ||
Operating | 150 | 300 | |||||
PD | Power dissipation | VDD = 3.3 V | 0.5 | mW | |||
VDD = 2.0 V | 0.3 |