SBAS683B August 2014 – May 2020 ADS1120-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
I1MUX[2:0] | I2MUX[2:0] | DRDYM | RESERVED | ||||
R/W-000b | R/W-000b | R/W-0b | R/W-0b |
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:5 | I1MUX[2:0] | R/W | 000b | IDAC1 routing configuration
These bits select the channel where IDAC1 is routed to. 000 : IDAC1 disabled (default) 001 : IDAC1 connected to AIN0/REFP1 010 : IDAC1 connected to AIN1 011 : IDAC1 connected to AIN2 100 : IDAC1 connected to AIN3/REFN1 101 : IDAC1 connected to REFP0 110 : IDAC1 connected to REFN0 111 : Not used |
4:2 | I2MUX[2:0] | R/W | 000b | IDAC2 routing configuration
These bits select the channel where IDAC2 is routed to. 000 : IDAC2 disabled (default) 001 : IDAC2 connected to AIN0/REFP1 010 : IDAC2 connected to AIN1 011 : IDAC2 connected to AIN2 100 : IDAC2 connected to AIN3/REFN1 101 : IDAC2 connected to REFP0 110 : IDAC2 connected to REFN0 111 : Not used |
1 | DRDYM | R/W | 0b | DRDY mode
This bit controls the behavior of the DOUT/DRDY pin when new data are ready. 0 : Only the dedicated DRDY pin is used to indicate when data are ready (default) 1 : Data ready is indicated simultaneously on DOUT/DRDY and DRDY |
0 | RESERVED | R/W | 0b | Reserved
Always write 0 |