JAJS456G
July 2009 – August 2016
ADS1146
,
ADS1147
,
ADS1148
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
4
改訂履歴
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Parameter Measurement Information
8.1
Noise Performance
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagrams
9.3
Feature Description
9.3.1
ADC Input and Multiplexer
9.3.2
Low-Noise PGA
9.3.2.1
PGA Common-Mode Voltage Requirements
9.3.2.2
PGA Common-Mode Voltage Calculation Example
9.3.2.3
Analog Input Impedance
9.3.3
Clock Source
9.3.4
Modulator
9.3.5
Digital Filter
9.3.6
Voltage Reference Input
9.3.7
Internal Voltage Reference
9.3.8
Excitation Current Sources
9.3.9
Sensor Detection
9.3.10
Bias Voltage Generation
9.3.11
General-Purpose Digital I/O
9.3.12
System Monitor
9.3.12.1
Power-Supply Monitor
9.3.12.2
External Voltage Reference Monitor
9.3.12.3
Ambient Temperature Monitor
9.4
Device Functional Modes
9.4.1
Power Up
9.4.2
Reset
9.4.3
Power-Down Mode
9.4.4
Conversion Control
9.4.4.1
Settling Time for Channel Multiplexing
9.4.4.2
Channel Cycling and Overload Recovery
9.4.4.3
Single-Cycle Settling
9.4.4.4
Digital Filter Reset Operation
9.4.5
Calibration
9.4.5.1
Offset Calibration Register: OFC[2:0]
9.4.5.2
Full-Scale Calibration Register: FSC[2:0]
9.4.5.3
Calibration Commands
9.4.5.3.1
System Offset and Self Offset Calibration
9.4.5.3.2
System Gain Calibration
9.4.5.4
Calibration Timing
9.5
Programming
9.5.1
Digital Interface
9.5.1.1
Chip Select (CS)
9.5.1.2
Serial Clock (SCLK)
9.5.1.3
Data Input (DIN)
9.5.1.4
Data Ready (DRDY)
9.5.1.5
Data Output and Data Ready (DOUT/DRDY)
9.5.1.6
SPI Reset
9.5.1.7
SPI Communication During Power-Down Mode
9.5.2
Data Format
9.5.3
Commands
9.5.3.1
WAKEUP (0000 000x)
9.5.3.2
SLEEP (0000 001x)
9.5.3.3
SYNC (0000 010x)
9.5.3.4
RESET (0000 011x)
9.5.3.5
RDATA (0001 001x)
9.5.3.6
RDATAC (0001 010x)
9.5.3.7
SDATAC (0001 011x)
9.5.3.8
RREG (0010 rrrr, 0000 nnnn)
9.5.3.9
WREG (0100 rrrr, 0000 nnnn)
9.5.3.10
SYSOCAL (0110 0000)
9.5.3.11
SYSGCAL (0110 0001)
9.5.3.12
SELFOCAL (0110 0010)
9.5.3.13
NOP (1111 1111)
9.5.3.14
Restricted Command (1111 0001)
9.6
Register Maps
9.6.1
ADS1146 Register Map
9.6.2
ADS1146 Detailed Register Definitions
9.6.2.1
BCS—Burn-out Current Source Register (offset = 00h) [reset = 01h]
9.6.2.2
VBIAS—Bias Voltage Register (offset = 01h) [reset = 00h]
9.6.2.3
MUX—Multiplexer Control Register (offset = 02h) [reset = x0h]
9.6.2.4
SYS0—System Control Register 0 (offset = 03h) [reset = 00h]
9.6.2.5
OFC—Offset Calibration Coefficient Registers (offset = 04h, 05h, 06h) [reset = 00h, 00h, 00h]
9.6.2.6
FSC—Full-Scale Calibration Coefficient Registers (offset = 07h, 08h, 09h) [reset = 00h, 00h, 40h]
9.6.2.7
ID—ID Register (offset = 0Ah) [reset = x0h]
9.6.3
ADS1147 and ADS1148 Register Map
9.6.4
ADS1147 and ADS1148 Detailed Register Definitions
9.6.4.1
MUX0—Multiplexer Control Register 0 (offset = 00h) [reset = 01h]
9.6.4.2
VBIAS—Bias Voltage Register (offset = 01h) [reset = 00h]
9.6.4.3
MUX1—Multiplexer Control Register 1 (offset = 02h) [reset = x0h]
9.6.4.4
SYS0—System Control Register 0 (offset = 03h) [reset = 00h]
9.6.4.5
OFC—Offset Calibration Coefficient Register (offset = 04h, 05h, 06h) [reset = 00h, 00h, 00h]
9.6.4.6
FSC—Full-Scale Calibration Coefficient Register (offset = 07h, 08h, 09h) [reset = 00h, 00h, 40h]
9.6.4.7
IDAC0—IDAC Control Register 0 (offset = 0Ah) [reset = x0h]
9.6.4.8
IDAC1—IDAC Control Register 1 (offset = 0Bh) [reset = FFh]
9.6.4.9
GPIOCFG—GPIO Configuration Register (offset = 0Ch) [reset = 00h]
9.6.4.10
GPIODIR—GPIO Direction Register (offset = 0Dh) [reset = 00h]
9.6.4.11
GPIODAT—GPIO Data Register (offset = 0Eh) [reset = 00h]
10
Application and Implementation
10.1
Application Information
10.1.1
Serial Interface Connections
10.1.2
Analog Input Filtering
10.1.3
External Reference and Ratiometric Measurements
10.1.4
Establishing a Proper Common-Mode Input Voltage
10.1.5
Isolated (or Floating) Sensor Inputs
10.1.6
Unused Inputs and Outputs
10.1.7
Pseudo Code Example
10.1.8
Channel Multiplexing Example
10.1.9
Power-Down Mode Example
10.2
Typical Applications
10.2.1
Ratiometric 3-Wire RTD Measurement System
10.2.1.1
Design Requirements
10.2.1.2
Detailed Design Procedure
10.2.1.2.1
Topology
10.2.1.2.2
RTD Selection
10.2.1.2.3
Excitation Current
10.2.1.2.4
Reference Resistor, RREF
10.2.1.2.5
PGA Setting
10.2.1.2.6
Common-Mode Input Range
10.2.1.2.7
Input and Reference Low-Pass Filters
10.2.1.2.8
Register Settings
10.2.1.3
Application Curves
10.2.2
K-Type Thermocouple Measurement (-200°C to 1250°C) With Cold-Junction Compensation
10.2.2.1
Design Requirements
10.2.2.2
Detailed Design Procedure
10.2.2.2.1
Biasing Resistors
10.2.2.2.2
Input Filtering
10.2.2.2.3
PGA Setting
10.2.2.2.4
Cold-Junction Measurement
10.2.2.2.5
Calculated Resolution
10.2.2.2.6
Register Settings
10.3
Do's and Don'ts
11
Power Supply Recommendations
11.1
Power Supply Sequencing
11.2
Power Supply Decoupling
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
デバイスおよびドキュメントのサポート
13.1
ドキュメントのサポート
13.1.1
関連資料
13.2
関連リンク
13.3
ドキュメントの更新通知を受け取る方法
13.4
コミュニティ・リソース
13.5
商標
13.6
静電気放電に関する注意事項
13.7
Glossary
14
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|20
MPDS362A
サーマルパッド・メカニカル・データ
PW|20
QFND419A
発注情報
jajs456g_oa
jajs456g_pm
5 Device Comparison Table
PRODUCT
RESOLUTION (BITS)
NUMBER OF INPUTS
VOLTAGE REFERENCE
EXCITATION CURRENT SOURCES
PACKAGE (PINS)
ADS1246
24
1 Differential
External
No
TSSOP (16)
ADS1247
24
4-Input Multiplexer
Internal or External
Yes
TSSOP (20)
ADS1248
24
8-Input Multiplexer
Internal or External
Yes
TSSOP (28)
ADS1146
16
1 Differential
External
No
TSSOP (16)
ADS1147
16
4-Input Multiplexer
Internal or External
Yes
TSSOP (20)
ADS1148
16
8-Input Multiplexer
Internal or External
Yes
TSSOP (28)
16
8-Input Multiplexer
Internal or External
Yes
VQFN (32)