JAJSF20B October 2017 – October 2018 ADS122C04
PRODUCTION DATA.
During power up, the device is held in reset. The power-on reset releases approximately 500 µs after both supplies have exceeded their respective power-up reset thresholds. After this time all internal circuitry (including the voltage reference) are stable and communication with the device is possible. As part of the power-on reset process, the device sets all bits in the configuration registers to the respective default settings. After power-up, the device enters a low-power state. This power-up behavior is intended to prevent systems with tight power-supply requirements from encountering a current surge during power-up.