JAJSOX0A March 2024 – June 2024 ADS127L18
ADVANCE INFORMATION
The low-latency filter is a cascaded-integrator-comb (CIC) topology with the attribute of minimal delay (latency) as the input data propagates through the filter. The CIC filter is otherwise known as a sinc filter because of the characteristic sinx/x (sinc) frequency response. The device offers the choice of four sinc filter configurations: sinc4, sinc4 + sinc1, sinc3, and sinc3 + sinc1. These configurations provide trade-offs of acquisition time, noise performance, and line-cycle rejection.
Latency time is measured from the time of device synchronization to the rising edge of FSYNC, at which time settled data are available. The latency time is shorter compared to the wideband filter, making the filter useful for fast acquisition of dc signals. There is no need to discard data because the data are settled. Detailed latency data for each sinc filter mode are given in Sinc4 Filter through Sinc3 + Sinc1 Filter.
If the input signal is changed without synchronizing the ADC, then the next several conversions are partially settled. The number of conversions required for fully settled data is determined by rounding the latency time value to the next whole number of conversion periods.
Equation 19 shows the general expression of the sinc-filter frequency response. For single-stage sinc filter options (for example, the single-stage sinc3 or sinc4 filter), the second stage is not used.
where: