JAJSHV4C January 2014 – August 2019 ADS1283
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | MUX2 | MUX1 | MUX0 | CHOP | PGA2 | PGA1 | PGA0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-1h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit[7] | Reserved |
Always write 0 | |
Bit[6:4] | MUX[2:0] |
MUX select bits. | |
000: AINP1 and AINN1 (default)
001: AINP2 and AINN2 010: Internal short through 400-Ω resistor 011: AINP1 and AINN1 connected to AINP2 and AINN2 100: External short to AINN2 |
|
Bit[3] | CHOP |
PGA chopping enable bit. | |
0: PGA chopping disabled
1: PGA chopping enabled (default) |
|
Bit[2:0] | PGA[2:0] |
PGA gain select bits. Note that ADS1283A supports PGA gains of 1, 4, and 16 only. | |
000: G = 1 (default)
001: G = 2 (ADS1283 and ADS1283B only) 010: G = 4 011: G = 8 (ADS1283 and ADS1283B only) 100: G = 16 101: G = 32 (ADS1283 and ADS1283B only) 110: G = 64 (ADS1283 and ADS1283B only) |