The ADS131B24-Q1 is a fully integrated, high-voltage battery pack monitor for automotive electrical vehicle (EV) battery management systems (BMS) that integrates two simultaneous-sampling, high-precision, 24-bit ADC channels (ADC1A, ADC1B) to redundantly measure battery current with high resolution and accuracy using an external shunt resistor. Two independent digital overcurrent detection comparators (OCCA, OCCB) work in parallel to the two ADCs for fast overcurrent detection.

Additionally, two multiplexed, 16-bit ADC channels (ADC2A, ADC2B) are available to measure shunt temperature using external temperature sensors, such as thermistors or analog output temperature sensors, and other voltages in the system. ADC2A and ADC2B are equipped with channel sequencers that automatically step through the configured multiplexer inputs, select them for measurement, and start ADC conversions.

The device is partitioned into two sections, A and B. The circuitry in section A is independent from the circuitry in section B. However, both sections are powered from the same supply, derive their respective clocks from the same main clock source, and share the same digital control and serial interface.

Besides the various ADC channels, each section provides:

• A precision, low-drift, 1.25-V voltage reference (REFA, REFB) that feeds the ADCs in each section
• A negative charge pump (NCPA, NCPB) that provides a negative supply voltage for the gain stages in front of each ADC to allow signal measurements below ground
• A temperature sensor (TSA, TSB) to measure die temperature through ADC2A and ADC2B, respectively
• A Test DAC (Test DAC A, Test DAC B), which generates precision test voltages that can be routed for measurement to the ADCs in the other section
• Two GPIOs (GPIO0A, GPIO1A and GPIO0B, GPIO1B) with logic levels based on AVDD

In many BMS applications, the pack monitor is powered from an unregulated isolated DC/DC converter. For that reason, the ADS131B24-Q1 integrates linear regulators (AVDD and IOVDD LDOs) that accept voltages between 4 V and 16 V and provide regulated 3.3-V analog and digital supply rails for the internal circuitry. The two low-dropout regulators (LDOs) can also provide a limited amount of current to external circuitry. A common use case is to power the primary side of a digital isolator, which isolates the SPI communication to a host microcontroller, with the IOVDD LDO output; see the ADS131B26Q1EVM-PDK Evaluation Module user guide.

The main clock for the ADS131B24-Q1 is either provided by the internal 8.192-MHz oscillator or by an external clock provided at the CLK pin.

A multitude of monitoring and diagnostic features are integrated in the device to mitigate and detect random hardware faults to aid in the development of functional safety BMS, such as:

• Supply undervoltage, overvoltage, overtemperature, and oscillation monitors
• Supply-voltage readback capability through ADC2A and ADC2B
• A set of open-wire detection current sources and sinks per ADC
• Clock monitors
• Cyclic redundancy check (CRC), timeout monitor, and SCLK counter on the SPI to achieve high data integrity for the communication
• Register and memory map CRC
• ADC conversion and sequence counters

The device offers five GPIOs (GPIO0 through GPIO4) with logic levels based on IOVDD and optional pulse-width modulation (PWM) input and output capability. GPIO2 can alternatively be configured as a FAULT output, and GPIO3 and GPIO4 can be configured as overcurrent comparator outputs.

As shown in Table 9-1, the ADS131B2x-Q1 family consists of three devices that differ in the amount of integrated ADC channels.