SLAS760D May   2011  – November 2015 ADS5263

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics, Dynamic Performance - 16-Bit ADC
    6. 7.6  Electrical Characteristics, General - 16-Bit ADC Mode
    7. 7.7  Electrical Characteristics, Dynamic Performance - 14-Bit ADC
    8. 7.8  Digital Characteristics
    9. 7.9  Timing Requirements
    10. 7.10 LVDS Timing at Lower Sampling Frequencies - 2 Wire, 8× Serialization
    11. 7.11 LVDS Timing for 1 Wire 16× Serialization
    12. 7.12 LVDS Timing for 2 Wire, 7× Serialization
    13. 7.13 LVDS Timing for 1 Wire, 14× Serialization
    14. 7.14 Serial Interface Timing Requirements
    15. 7.15 Reset Switching Characteristics
    16. 7.16 Typical Characteristics
      1. 7.16.1 Typical Characteristic - 16-Bit ADC Mode
      2. 7.16.2 Typical Characteristic - 14-Bit ADC Mode
      3. 7.16.3 Typical Characteristics - Common Plots
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital Processing Blocks
      2. 8.3.2 Digital Gain
      3. 8.3.3 Digital Filter
      4. 8.3.4 Custom Filter Coefficients
        1. 8.3.4.1 Custom Filter Without Decimation
      5. 8.3.5 Digital Averaging
      6. 8.3.6 Performance with Digital Processing Blocks
        1. 8.3.6.1 18-Bit Data Output with Digital Processing
      7. 8.3.7 Flexible Mapping o Channel Data to LVDS Outputs
      8. 8.3.8 Output LVDS Interface
      9. 8.3.9 Programmable LCLK Phase
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Configuration
      2. 8.4.2 Serial Register Readout
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
      2. 8.5.2 Register Initialization
    6. 8.6 Register Maps
      1. 8.6.1 Default State After Reset
      2. 8.6.2 Description of Serial Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Analog Input
        1. 9.1.1.1 Drive Circuit Requirements
      2. 9.1.2 Large and Small Signal Input Bandwidth
      3. 9.1.3 Clamp Function For CCD Signals
        1. 9.1.3.1 Differential Input Drive
        2. 9.1.3.2 Clamp Operation
        3. 9.1.3.3 Synchronization to External CCD Timing
      4. 9.1.4 Low-Frequency Noise Suppression
      5. 9.1.5 External Reference Mode
    2. 9.2 Typical Applications
      1. 9.2.1 Driving Circuit Design: Low Input Frequencies (< 50 MHz)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Driving Circuit Design: Input Frequencies > 50 MHz
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Definition of Specifications
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Packaging
      1. 13.1.1 Exposed Pad
      2. 13.1.2 Non-Magnetic Package

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

13.1 Packaging

13.1.1 Exposed Pad

The exposed pad at the bottom of the package is the main path for heat dissipation. Therefore, the pad must be soldered to a ground plane on the PCB for best thermal performance. The pad must be connected to the ground plane through the optimum number of vias.

For detailed information, see application notes QFN Layout Guidelines (SLOA122) and QFN/SON PCB Attachment (SLUA271), both available for download at the TI web site (www.ti.com). One can also visit TI’s thermal website at www.ti.com/thermal.

13.1.2 Non-Magnetic Package

An important requirement in magnetic resonance imaging (MRI) applications is the magnetic compatibility of components mounted close to the RF coil area. Any ferromagnetic material in the component package introduces an artifact in the MRI image. Therefore, it is preferred to have components with non-magnetic packages.

The ADS5263 is available in a special non-magnetic package that does not create any image artifacts, even in the presence of high magnetic fields. The non-magnetic part is orderable with the suffix “-NM”.