JAJSEQ8D May   2013  – March 2018 ADS7250 , ADS7850 , ADS8350

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     機能ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: All Devices
    6. 6.6  Electrical Characteristics: ADS7250
    7. 6.7  Electrical Characteristics: ADS7850
    8. 6.8  Electrical Characteristics: ADS8350
    9. 6.9  Timing Requirements
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics: ADS7250
    12. 6.12 Typical Characteristics: ADS7850
    13. 6.13 Typical Characteristics: ADS8350
    14. 6.14 Typical Characteristics: All Devices
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Reference
      2. 7.3.2 Analog Input
        1. 7.3.2.1 Analog Input Full-Scale Range
      3. 7.3.3 ADC Transfer Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface
      2. 7.4.2 Short-Cycling, Frame Abort, and Reconversion Feature
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 DAQ Circuit: Maximum SINAD for a 10-kHz Input Signal at 750-kSPS Throughput
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 ADC Reference Driver
          2. 8.2.1.2.2 ADC Input Driver
            1. 8.2.1.2.2.1 Input Amplifier Selection
            2. 8.2.1.2.2.2 Antialiasing Filter
        3. 8.2.1.3 Application Curve
      2. 8.2.2 DAQ Circuit: Maximum SINAD for a 100-kHz Input Signal at 750-kSPS Throughput
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 ADC Reference Driver
          2. 8.2.2.2.2 ADC Input Driver
        3. 8.2.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 関連リンク
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Electrical Characteristics: ADS7250

minimum and maximum specifications are at TA = –40°C to 125°C, AVDD = 5 V, VREFIN_A = VREFIN_B = VREF, and tDATA = 750 kSPS (unless otherwise noted); typical values are at TA = 25°C, AVDD = 5 V, and DVDD = 3.3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RESOLUTION
Resolution 12 Bits
DC ACCURACY
INL Integral nonlinearity –1 ±0.5 1 LSB
DNL Differential nonlinearity –0.99 ±0.4 1 LSB
VOS Input offset error –2 ±0.75 2 mV
VOS match ADC_A to ADC_B –2 ±0.75 2 mV
dVOS/dT Input offset thermal drift 1 µV/°C
GERR Gain error Referenced to voltage at REFIN_x –0.1% ±0.05% 0.1%
GERR match ADC_A to ADC_B –0.1% ±0.05% 0.1%
GERR/dT Gain error thermal drift Referenced to voltage at REFIN_x 1 ppm/°C
CMRR Common-mode rejection ratio Both ADCs, dc to 20 kHz 74 dB
AC ACCURACY
SINAD Signal-to-noise + distortion –0.5 dBFS at 20-kHz input 71.5 72.9 dB
–0.5 dBFS at 100-kHz input 72.9
–0.5 dBFS at 250-kHz input 72.5
SNR Signal-to-noise ratio –0.5 dBFS at 20-kHz input 72 73 dB
–0.5 dBFS at 100-kHz input 73
–0.5 dBFS at 250-kHz input 73
THD Total harmonic distortion –0.5 dBFS at 20-kHz input –90 dB
–0.5 dBFS at 100-kHz input –90
–0.5 dBFS at 250-kHz input –82
SFDR Spurious-free dynamic range –0.5 dBFS at 20-kHz input 90 dB
–0.5 dBFS at 100-kHz input 90
–0.5 dBFS at 250-kHz input 82
Isolation between ADC_A and ADC_B fIN = 15 kHz, fNOISE = 25 kHz –85 dB
BW(FP) Full-power bandwidth At –3 dB 25 MHz
At –0.1 dB 5