4 改訂履歴
Changes from B Revision (July 2015) to C Revision
- Changed 「特長」の入力レンジで0~2.5Vおよび0~5Vを0~VREFおよび0~2×VREFにGo
- Changed 「特長」のGPIOGo
- Changed 「アプリケーション」の光ライン・カード監視およびマルチチャネル汎用信号監視Go
- Changed 「概要」セクションで(0V~2.5Vおよび0V~5V)を(0V~VREFおよび0V~2×VREF)にGo
- Deleted 製品比較表Go
- Changed RGE to RHB for two 32-pin VQFN pin diagrams Go
- Added 30-pin DBT package Go
- Changed I/O column of Pin Functions: TSSOP Packages table to show full definition instead of abbreviationGo
- Added active low to definition of CS pin in Pin Functions: TSSOP Packages tableGo
- Changed pin name and description of Alarm pin in Pin Functions: TSSOP Packages table Go
- Added settings to description of Range pin in Pin Functions: TSSOP Packages table: added (1) to high and (0) to lowGo
- Added active low to description of CS pin in Pin Functions: VQFN Packages tableGo
- Changed pin name and description of Alarm pin in Pin Functions: VQFN Packages table Go
- Changed value of Input current to any pin except supply pins row from ±10 mA (max) to –10 mA (min) and 10 mA (max) in Absolute Maximum Ratings tableGo
- Changed VBD = 1.7 V to 5.25 V to VBD = 1.7 V to +VA in condition statementGo
- Changed minimum specification from –1 LSB to –0.99 LSB in first row of Differential linearity parameterGo
- Added input to Reference input resistance parameter nameGo
- Changed maximum specification from FFC Hex to 4092 LSB in Alarm Setting parameters Go
- Changed unit from Numbers to Conversion in Invalid conversions after power up or reset parameter Go
- Changed VBD = 1.7 V to 5.25 V to VBD = 1.7 V to +VA in condition statement Go
- Added input to Reference input resistance parameter name Go
- Changed maximum specification from FFC Hex to 4092 LSB in Alarm Setting parameters Go
- Changed VBD = 1.7 V to 5.25 V to VBD = 1.7 V to +VA in condition statement Go
- Added input to Reference input resistance parameter name Go
- Changed maximum specification from FF Hex to 255 LSB in Alarm Setting parameters Go
- Changed unit from Numbers to Conversion in Invalid conversions after power up or reset parameter Go
- Changed REF and GND pins to REFP and REFM pins in the Reference section Go
- Added Example Manual Mode Timing Diagram figure and corresponding text to Operating in Manual Mode section Go
- Added Example Auto-1 Mode Timing Diagram figure and corresponding text to the Operating in Auto-1 Mode section Go
- Added Example Auto-2 Mode Timing Diagram figure and corresponding text to the Operating in Auto-2 Mode section Go
- Changed 2.5V to VREF in first DI06 row and 5V to 2xVREF in second DI06 rowGo
- Changed binary code from 0001 1111 1111 to 0011 1111 1111 in Full scale row of Ideal Input Voltages for 10-Bit Devices and Digital Output Codes for 10-Bit Devices (ADS7954/55/56/57) tableGo
- Changed 10-Bit to 8-Bit in title of Ideal Input Voltages for 8-Bit Devices and Digital Output Codes for 8-Bit Devices (ADS7958/59/60/61) tableGo
- Changed Application Diagram for an Unbuffered MXO figure note Go
- Changed Recommended Layout figure title to Recommended Layout for the TSSOP Packaged DeviceGo
- Added Recommended Layout for the VQFN Packaged Device figureGo
Changes from A Revision (April 2010) to B Revision
- Added 「ESD定格」の表、「機能説明」セクション、「デバイスの機能モード」、「アプリケーションと実装」セクション、「電源に関する推奨事項」セクション、「レイアウト」セクション、「デバイスおよびドキュメントのサポート」セクション、「メカニカル、パッケージ、および注文情報」セクションGo
Changes from * Revision (June 2008) to A Revision
- Added QFN情報を「特長」にGo
- Added QFN情報を「概要」にGo
- Changed VEE to AGND and VCC to +VA on 38-pin TSSOP pinoutGo
- Added QFN pinoutGo
- Added QFN pinoutGo
- Added QFN pinoutGo
- Added QFN pinoutGo
- Added terminal functions for QFN packagesGo
- Changed ADS7950/4/8 QFN package MXO pin from 7 to 3Go
- Added VREF = 2.5 V ± 0.1 V to Electrical Characteristics, ADS7950/51/52/53Go
- Added while 2VREF ≤ +VA to full-scale input span range 2 test conditionsGo
- Added while 2VREF ≤ +VA to Absolute input range span range 2 test conditionsGo
- Added Total unadjusted error (TUE) specificationGo
- Changed reference voltage at REFP min and max valuesGo
- Added Note to Electrical Characteristics, ADS7950/51/52/53 Go
- Added VREF = 2.5 V ± 0.1 V to Electrical Characteristics, ADS7954/55/56/57 test conditionsGo
- Added while 2VREF ≤ +VA to full-scale input span range 2 test conditionsGo
- Added while 2VREF ≤ +VA to full-scale input span range 2 test conditionsGo
- Changed Vref reference voltage at REFP min value from 2.49 V to 2.0 VGo
- Changed Vref reference voltage at REFP max value from 2.51 V to 3.0 VGo
- Added Vref = 2.5 V ± 0.1 V to Electrical Characteristics, ADS7958/59/60/61 test conditionsGo
- Added while 2VREF ≤ +VA to full-scale input span range 2 test conditionsGo
- Added while 2VREF ≤ +VA to full-scale input span range 2 test conditionsGo
- Changed Vref reference voltage at REFP min value from 2.49 V to 2.0 VGo
- Changed Vref reference voltage at REFP max value from 2.51 V to 3.0 VGo
- Changed tsu1 values from max to minGo
- Changed tsu2 values from max to minGo
- Added TOTAL UNADJUSTED ERROR (TUE Max) graphGo
- Added TOTAL UNADJUSTED ERROR (TUE Min) graphGo
- Changed GPIO pins descriptionGo
- Added device powerdown through GPIO in the case of the TSSOP packaged devicesGo
- Added note to Table 1Go
- Added note to Table 2Go
- Added note to Table 5Go
- Added note to Programming GPIO Registers descriptionGo
- Added QFN information to Table 11Go
- Changed DI12 = 1? from No or No to Yes or No in Figure 59Go
- Added note to Figure 60Go