SBAS652A May   2014  – August 2014 ADS7950-Q1 , ADS7951-Q1 , ADS7952-Q1 , ADS7953-Q1 , ADS7954-Q1 , ADS7956-Q1 , ADS7957-Q1 , ADS7958-Q1 , ADS7959-Q1 , ADS7960-Q1 , ADS7961-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: ADS7950-Q1, ADS7951-Q1, ADS7952-Q1, ADS7953-Q1
    6. 7.6  Electrical Characteristics: ADS7954-Q1, ADS7956-Q1, ADS7957-Q1
    7. 7.7  Electrical Characteristics: ADS7958-Q1, ADS7959-Q1, ADS7960-Q1, ADS7961-Q1
    8. 7.8  Timing Requirements
    9. 7.9  Typical Characteristics (All ADS79xx-Q1 Family Devices)
    10. 7.10 Typical Characteristics (12-Bit Devices Only)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Operation
      2. 8.3.2 Device Power-up Sequence
      3. 8.3.3 Analog Input
      4. 8.3.4 Reference
      5. 8.3.5 Power Saving
    4. 8.4 Device Functional Modes
      1. 8.4.1 Channel Sequencing Modes
      2. 8.4.2 Device Programming and Mode Control
        1. 8.4.2.1 Mode Control Register
        2. 8.4.2.2 Program Registers
      3. 8.4.3 Operating In Manual Mode
      4. 8.4.4 Operating In Auto-1 Mode
      5. 8.4.5 Operating In Auto-2 Mode
      6. 8.4.6 Continued Operation In A Selected Mode
    5. 8.5 Digital Output Code
    6. 8.6 Programming: GPIO
      1. 8.6.1 GPIO Registers
      2. 8.6.2 Alarm Thresholds for GPIO Pins
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Unbuffered Multiplexer Output (MXO)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 OPA192 Buffered Multiplexer Output (MXO)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power-Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

  • A copper fill area underneath the device ties the AGND, BDGND, AINM, and REFM pins together. This copper fill area must also be connected to the analog ground plane of the PCB using at least four vias.
  • The power sources must be clean and properly decoupled by placing a capacitor close to each of the three supply pins, as shown in Figure 64. To minimize ground inductance, ensure that each capacitor ground pin is connected to a grounding via by a very short and thick trace.
  • The REFP pin requires a 10-μF ceramic capacitor to meet performance specifications. Place the capacitor directly next to the device. This capacitor ground pin must be routed to the REFM pin by a very short trace, as shown in Figure 64.
  • Do not place any vias between a capacitor pin and a device pin.

NOTE

The full-power bandwidth of the converter makes the ADC sensitive to high frequencies in digital lines. Organize components in the PCB by keeping digital lines apart from the analog signal paths. This design configuration is critical to minimize crosstalk. For example, in Figure 64, input drivers are expected to be on the left of the converter and the microcontroller on the right.

11.2 Layout Example

ADS795x_LAYOUT.gifFigure 64. Layout Example