SBAS652A May   2014  – August 2014 ADS7950-Q1 , ADS7951-Q1 , ADS7952-Q1 , ADS7953-Q1 , ADS7954-Q1 , ADS7956-Q1 , ADS7957-Q1 , ADS7958-Q1 , ADS7959-Q1 , ADS7960-Q1 , ADS7961-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: ADS7950-Q1, ADS7951-Q1, ADS7952-Q1, ADS7953-Q1
    6. 7.6  Electrical Characteristics: ADS7954-Q1, ADS7956-Q1, ADS7957-Q1
    7. 7.7  Electrical Characteristics: ADS7958-Q1, ADS7959-Q1, ADS7960-Q1, ADS7961-Q1
    8. 7.8  Timing Requirements
    9. 7.9  Typical Characteristics (All ADS79xx-Q1 Family Devices)
    10. 7.10 Typical Characteristics (12-Bit Devices Only)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Operation
      2. 8.3.2 Device Power-up Sequence
      3. 8.3.3 Analog Input
      4. 8.3.4 Reference
      5. 8.3.5 Power Saving
    4. 8.4 Device Functional Modes
      1. 8.4.1 Channel Sequencing Modes
      2. 8.4.2 Device Programming and Mode Control
        1. 8.4.2.1 Mode Control Register
        2. 8.4.2.2 Program Registers
      3. 8.4.3 Operating In Manual Mode
      4. 8.4.4 Operating In Auto-1 Mode
      5. 8.4.5 Operating In Auto-2 Mode
      6. 8.4.6 Continued Operation In A Selected Mode
    5. 8.5 Digital Output Code
    6. 8.6 Programming: GPIO
      1. 8.6.1 GPIO Registers
      2. 8.6.2 Alarm Thresholds for GPIO Pins
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Unbuffered Multiplexer Output (MXO)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 OPA192 Buffered Multiplexer Output (MXO)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power-Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configurations and Functions

DBT Package
TSSOP-30
(Top View)
pos_sbas652.gif
NC = No internal connection
DBT Package
TSSOP-38
(Top View)
pos2_sbas652.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NUMBER
ADS7953-Q1,
ADS7957-Q1,
ADS7961-Q1		 ADS7952-Q1,
ADS7956-Q1,
ADS7960-Q1		 ADS7951-Q1,
ADS7959-Q1		 ADS7950-Q1,
ADS7954-Q1,
ADS7958-Q1
ADC ANALOG INPUT
AINM 9 9 9 9 I ADC input ground
AINP 8 8 8 8 I Signal input to ADC
DIGITAL CONTROL SIGNALS
CS 31 31 23 23 I Chip-select input
SCLK 32 32 24 24 I Serial clock input
SDI 33 33 25 25 I Serial data input
SDO 34 34 26 26 O Serial data output
GENERAL PURPOSE INPUTS AND OUTPUTS(1)
GPIO0 37 37 29 29 I/O General-purpose input or output
High or low alarm O Active high output indicating high alarm or low alarm, depending on programming
GPIO1 38 38 30 30 I/O General-purpose input or output
Low alarm O Active high output indicating low alarm
GPIO2 1 1 1 1 I/O General-purpose input or output
Range I Selects range: High → Range 2; Low → Range 1
GPIO3 2 2 2 2 I/O Genera-purpose input or output
PD I Active low power-down input
MULTIPLEXER
Ch0 28 28 20 20 I Analog channels for multiplexer
Ch1 27 27 19 18 I
Ch2 26 26 18 14 I
Ch3 25 25 17 12 I
Ch4 24 24 14 — I
Ch5 23 23 13 — I
Ch6 22 22 12 — I
Ch7 21 21 11 — I
Ch8 18 18 — — I
Ch9 17 17 — — I
Ch10 16 16 — — I
Ch11 15 15 — — I
Ch12 14 — — — I
Ch13 13 — — — I
Ch14 12 — — — I
Ch15 11 — — — I
MXO 7 7 7 7 O Multiplexer output
NC PINS
NC — 11 15 11 — Pins internally not connected, do not float these pins
12 16 13
13 — 15
14 — 16
— — 17
— — 19
POWER SUPPLY AND GROUND
AGND 6 6 6 6 — Analog ground
10 10 10 10
19 19 22 22
20 20 — —
30 30 — —
BDGND 35 35 27 27 — Digital ground
+VA 5 5 5 5 — Analog power supply
29 29 21 21
+VBD 36 36 28 28 — Digital I/O supply
REFERENCE
REFM 3 3 3 3 I Reference ground
REFP 4 4 4 4 I Reference input
(1) These pins have programmable dual functionality. See Table 12 for functionality programming.