JAJSEQ8D May 2013 – March 2018 ADS7250 , ADS7850 , ADS8350
PRODUCTION DATA.
The device output is in binary twos complement format. Device resolution is calculated by Equation 6:
where
Table 1 shows the different input voltages and the corresponding device output codes.
INPUT VOLTAGE
(AINM_x) |
INPUT VOLTAGE
(AINP_x) |
PSEUDO-DIFFERENTIAL INPUT TO ADC
(AINP_x - AINM_x) |
OUTPUT CODE (HEX) | ||||
---|---|---|---|---|---|---|---|
CODE | ADS7250 | ADS7850 | ADS8350 | ||||
VREFIN_x | 0 | –VREFIN_x | NFSR | NFSC | 800 | 2000 | 8000 |
1 LSB | – VREFIN_x + 1 LSB | NFSR + 1 LSB | NFSC + 1 | 801 | 2001 | 8001 | |
VREFIN_x – 1 LSB | –1 LSB | –1 LSB | MC | FFF | 3FFF | FFFF | |
VREFIN_x | 0 | 0 | PLC | 000 | 0000 | 0000 | |
2 × VREFIN_x – 1 LSB | VREFIN_x – 1 LSB | PFSR – 1 LSB | PFSC | 7FF | 1FFF | 7FFF |
Figure 51 shows the ideal transfer characteristics for the device.